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From: Zhao Liu <zhao1.liu@intel.com>
To: Xiaoyao Li <xiaoyao.li@intel.com>
Cc: "Paolo Bonzini" <pbonzini@redhat.com>,
	"Daniel P . Berrangé" <berrange@redhat.com>,
	"Igor Mammedov" <imammedo@redhat.com>,
	"Ewan Hai" <ewanhai-oc@zhaoxin.com>, "Tao Su" <tao1.su@intel.com>,
	"Yi Lai" <yi1.lai@intel.com>, "Dapeng Mi" <dapeng1.mi@intel.com>,
	qemu-devel@nongnu.org, "Tao Su" <tao1.su@linux.intel.com>
Subject: Re: [PATCH v2 2/7] i386/cpu: Mark CPUID 0x80000008 ECX bits[0:7] & [12:15] as reserved for Intel/Zhaoxin
Date: Mon, 14 Jul 2025 17:23:13 +0800	[thread overview]
Message-ID: <aHTMgdePYYSYzsUJ@intel.com> (raw)
In-Reply-To: <42817b7d-445f-4940-9070-e3c939a6e90f@intel.com>

> >           if (threads_per_pkg > 1) {
> >               /*
> > -             * Bits 15:12 is "The number of bits in the initial
> > -             * Core::X86::Apic::ApicId[ApicId] value that indicate
> > -             * thread ID within a package".
> > -             * Bits 7:0 is "The number of threads in the package is NC+1"
> > +             * Don't emulate Bits [7:0] & Bits [15:12] for Intel/Zhaoxin, since
> > +             * they're using 0x1f leaf.
> >                */
> > -            *ecx = (apicid_pkg_offset(topo_info) << 12) |
> > -                   (threads_per_pkg - 1);
> > +            if (cpu->vendor_cpuid_only_v2 &&
> > +                (IS_INTEL_CPU(env) || IS_ZHAOXIN_CPU(env))) {
> > +                    *ecx = 0;
> > +            } else {
> > +                /*
> > +                 * Bits 15:12 is "The number of bits in the initial
> > +                 * Core::X86::Apic::ApicId[ApicId] value that indicate
> > +                 * thread ID within a package".
> > +                 * Bits 7:0 is "The number of threads in the package is NC+1"
> > +                 */
> > +                *ecx = (apicid_pkg_offset(topo_info) << 12) |
> > +                       (threads_per_pkg - 1);
> > +            }
> >           } else {
> >               *ecx = 0;
> >           }
> 
> I prefer below:
> 
> 	if ((cpu->vendor_cpuid_only_v2 &&
> 	    (IS_INTEL_CPU(env) || IS_ZHAOXIN_CPU(env))) ||
> 	    threads_per_pkg < 2) {
> 		*ecx = 0;
> 	} else {
> 		...
> 	}

Yes, this works, but I would like to keep the vendor-related checks
separate from other logic - to avoid mixing them together.

Then it makes the code logic clearer and makes it easier for future
changes.

Thanks for your review!
Zhao



  reply	other threads:[~2025-07-14  9:31 UTC|newest]

Thread overview: 20+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-07-14  8:08 [PATCH v2 0/7] i386/cpu: Clean Up Reserved CPUID Leaves & Topology Overflow Fix Zhao Liu
2025-07-14  8:08 ` [PATCH v2 1/7] i386/cpu: Mark EBX/ECX/EDX in CPUID 0x80000000 leaf as reserved for Intel Zhao Liu
2025-07-14  8:15   ` Xiaoyao Li
2025-07-14  8:08 ` [PATCH v2 2/7] i386/cpu: Mark CPUID 0x80000008 ECX bits[0:7] & [12:15] as reserved for Intel/Zhaoxin Zhao Liu
2025-07-14  8:27   ` Xiaoyao Li
2025-07-14  9:23     ` Zhao Liu [this message]
2025-07-14  8:08 ` [PATCH v2 3/7] i386/cpu: Reorder CPUID leaves in cpu_x86_cpuid() Zhao Liu
2025-07-14  8:08 ` [PATCH v2 4/7] i386/cpu: Fix number of addressable IDs field for CPUID.01H.EBX[23:16] Zhao Liu
2025-07-14  8:29   ` Xiaoyao Li
2025-07-16 15:31   ` Michael Tokarev
2025-07-17  3:06     ` Zhao Liu
2025-07-17  3:25       ` Michael Tokarev
2025-07-17  4:09         ` Zhao Liu
2025-07-14  8:08 ` [PATCH v2 5/7] i386/cpu: Fix cpu number overflow in CPUID.01H.EBX[23:16] Zhao Liu
2025-07-14  8:08 ` [PATCH v2 6/7] i386/cpu: Fix overflow of cache topology fields in CPUID.04H Zhao Liu
2025-07-14  8:08 ` [PATCH v2 7/7] i386/cpu: Honor maximum value for CPUID.8000001DH.EAX[25:14] Zhao Liu
2025-07-14 14:51   ` Moger, Babu
2025-07-14 15:41     ` Zhao Liu
2025-07-14 15:25       ` Moger, Babu
2025-07-14  8:25 ` [PATCH v2 0/7] i386/cpu: Clean Up Reserved CPUID Leaves & Topology Overflow Fix Paolo Bonzini

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