From: Leo Liang <ycliang@andestech.com>
To: Eoin Dickson <Eoin.Dickson@microchip.com>
Cc: <u-boot@lists.denx.de>, <rick@andestech.com>,
<Conor.Dooley@microchip.com>, <Jamie.Gibbons@microchip.com>,
<Praveen.Kumar@microchip.com>, <Cyril.Jean@microchip.com>,
<jagan@amarulasolutions.com>
Subject: Re: [PATCH v3 2/2] spi: coreqspi: add xfer function for PolarFire SoC
Date: Thu, 17 Jul 2025 13:39:32 +0800 [thread overview]
Message-ID: <aHiMlONE13-mwkMs@swlinux02> (raw)
In-Reply-To: <20250708130121.1769247-3-Eoin.Dickson@microchip.com>
On Tue, Jul 08, 2025 at 06:31:21PM +0530, Eoin Dickson wrote:
> From: Eoin Dickson <eoin.dickson@microchip.com>
>
> Add xfer function to PolarFire SoC coreqspi driver. The read and write
> operations are limited to one byte at a time instead of four as CMD18
> (multiple block read) reads garbage when four byte ops are enabled.
>
> Signed-off-by: Eoin Dickson <eoin.dickson@microchip.com>
> ---
> drivers/spi/microchip_coreqspi.c | 113 ++++++++++++++++++++++++++++++-
> 1 file changed, 111 insertions(+), 2 deletions(-)
Acked-by: Leo Yu-Chi Liang <ycliang@andestech.com>
prev parent reply other threads:[~2025-07-17 5:39 UTC|newest]
Thread overview: 6+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-07-08 13:01 [PATCH v3 0/2] Add SD card support to the Beagle-V-Fire Eoin Dickson
2025-07-08 13:01 ` [PATCH v3 1/2] gpio: add PolarFire SoC GPIO and Core GPIO driver Eoin Dickson
2025-07-17 5:38 ` Leo Liang
2025-07-24 18:54 ` Tom Rini
2025-07-08 13:01 ` [PATCH v3 2/2] spi: coreqspi: add xfer function for PolarFire SoC Eoin Dickson
2025-07-17 5:39 ` Leo Liang [this message]
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