Re: [PATCH v3 5/5] drm/xe/query: use PAGE_SIZE as the minimum page alignment

[Rodrigo Vivi <rodrigo.vivi@intel.com>]

On Wed, Jul 23, 2025 at 04:45:17PM +0900, Simon Richter wrote:
> From: Mingcong Bai <jeffbai@aosc.io>
> 
> As this component hooks into userspace API, it should be assumed that it
> will play well with non-4KiB/64KiB pages.
> 
> Use `PAGE_SIZE' as the final reference for page alignment instead.
> 
> Cc: stable@vger.kernel.org
> Fixes: dd08ebf6c352 ("drm/xe: Introduce a new DRM driver for Intel GPUs")
> Fixes: 801989b08aff ("drm/xe/uapi: Make constant comments visible in kernel doc")
> Tested-by: Mingcong Bai <jeffbai@aosc.io>
> Tested-by: Wenbin Fang <fangwenbin@vip.qq.com>
> Tested-by: Haien Liang <27873200@qq.com>
> Tested-by: Jianfeng Liu <liujianfeng1994@gmail.com>
> Tested-by: Shirong Liu <lsr1024@qq.com>
> Tested-by: Haofeng Wu <s2600cw2@126.com>
> Link: https://github.com/FanFansfan/loongson-linux/commit/22c55ab3931c32410a077b3ddb6dca3f28223360
> Link: https://t.me/c/1109254909/768552
> Co-developed-by: Shang Yatsen <429839446@qq.com>
> Signed-off-by: Shang Yatsen <429839446@qq.com>
> Signed-off-by: Mingcong Bai <jeffbai@aosc.io>
> ---
>  drivers/gpu/drm/xe/xe_query.c | 2 +-
>  include/uapi/drm/xe_drm.h     | 7 +++++--
>  2 files changed, 6 insertions(+), 3 deletions(-)
> 
> diff --git a/drivers/gpu/drm/xe/xe_query.c b/drivers/gpu/drm/xe/xe_query.c
> index 44d44bbc71dc..f695d5d0610d 100644
> --- a/drivers/gpu/drm/xe/xe_query.c
> +++ b/drivers/gpu/drm/xe/xe_query.c
> @@ -347,7 +347,7 @@ static int query_config(struct xe_device *xe, struct drm_xe_device_query *query)
>  	config->info[DRM_XE_QUERY_CONFIG_FLAGS] |=
>  			DRM_XE_QUERY_CONFIG_FLAG_HAS_LOW_LATENCY;
>  	config->info[DRM_XE_QUERY_CONFIG_MIN_ALIGNMENT] =
> -		xe->info.vram_flags & XE_VRAM_FLAGS_NEED64K ? SZ_64K : SZ_4K;
> +		xe->info.vram_flags & XE_VRAM_FLAGS_NEED64K ? SZ_64K : PAGE_SIZE;
>  	config->info[DRM_XE_QUERY_CONFIG_VA_BITS] = xe->info.va_bits;
>  	config->info[DRM_XE_QUERY_CONFIG_MAX_EXEC_QUEUE_PRIORITY] =
>  		xe_exec_queue_device_get_max_priority(xe);
> diff --git a/include/uapi/drm/xe_drm.h b/include/uapi/drm/xe_drm.h
> index e2426413488f..5ba76b9369ba 100644
> --- a/include/uapi/drm/xe_drm.h
> +++ b/include/uapi/drm/xe_drm.h
> @@ -397,8 +397,11 @@ struct drm_xe_query_mem_regions {
>   *      has low latency hint support
>   *    - %DRM_XE_QUERY_CONFIG_FLAG_HAS_CPU_ADDR_MIRROR - Flag is set if the
>   *      device has CPU address mirroring support
> - *  - %DRM_XE_QUERY_CONFIG_MIN_ALIGNMENT - Minimal memory alignment
> - *    required by this device, typically SZ_4K or SZ_64K
> + *  - %DRM_XE_QUERY_CONFIG_MIN_ALIGNMENT - Minimal memory alignment required
> + *    by this device and the CPU. The minimum page size for the device is
> + *    usually SZ_4K or SZ_64K, while for the CPU, it is PAGE_SIZE. This value
> + *    is calculated by max(min_gpu_page_size, PAGE_SIZE). This alignment is
> + *    enforced on buffer object allocations and VM binds.

honest question: if it is vram needing 64k we give 64k alignment, otherwise
nowadays regardless if it is vram or system memory we give 4k.

what should happen with non-64k vram request on these systems? really give
the cpu alignemnt or continue with the 4k for gpu?

>   *  - %DRM_XE_QUERY_CONFIG_VA_BITS - Maximum bits of a virtual address
>   *  - %DRM_XE_QUERY_CONFIG_MAX_EXEC_QUEUE_PRIORITY - Value of the highest
>   *    available exec queue priority
> -- 
> 2.47.2
>