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From: Abel Vesa <abel.vesa@linaro.org>
To: Taniya Das <taniya.das@oss.qualcomm.com>
Cc: kernel@oss.qualcomm.com, Pankaj Patil <quic_pankpati@quicinc.com>,
	Bjorn Andersson <andersson@kernel.org>,
	Michael Turquette <mturquette@baylibre.com>,
	Stephen Boyd <sboyd@kernel.org>, Rob Herring <robh@kernel.org>,
	Krzysztof Kozlowski <krzk+dt@kernel.org>,
	Conor Dooley <conor+dt@kernel.org>,
	Taniya Das <quic_tdas@quicinc.com>,
	linux-arm-msm@vger.kernel.org, linux-clk@vger.kernel.org,
	devicetree@vger.kernel.org, linux-kernel@vger.kernel.org
Subject: Re: [PATCH v3 3/7] clk: qcom: Add TCSR clock driver for Glymur
Date: Fri, 1 Aug 2025 08:31:20 +0300	[thread overview]
Message-ID: <aIxRKHKdBHDefDs2@linaro.org> (raw)
In-Reply-To: <784545d0-2173-4a8b-9d5d-bee11226351e@oss.qualcomm.com>

On 25-08-01 10:02:15, Taniya Das wrote:
> 
> 
> On 7/30/2025 4:55 PM, Abel Vesa wrote:
> > On 25-07-29 11:12:37, Taniya Das wrote:
> >> Add a clock driver for the TCSR clock controller found on Glymur, which
> >> provides refclks for PCIE, USB, and UFS.
> >>
> >> Signed-off-by: Taniya Das <taniya.das@oss.qualcomm.com>
> >> ---
> >>  drivers/clk/qcom/Kconfig         |   8 ++
> >>  drivers/clk/qcom/Makefile        |   1 +
> >>  drivers/clk/qcom/tcsrcc-glymur.c | 257 +++++++++++++++++++++++++++++++++++++++
> >>  3 files changed, 266 insertions(+)
> >>
> > 
> > [...]
> > 
> >> +
> >> +static struct clk_branch tcsr_edp_clkref_en = {
> >> +	.halt_reg = 0x1c,
> >> +	.halt_check = BRANCH_HALT_DELAY,
> >> +	.clkr = {
> >> +		.enable_reg = 0x1c,
> >> +		.enable_mask = BIT(0),
> >> +		.hw.init = &(const struct clk_init_data) {
> >> +			.name = "tcsr_edp_clkref_en",
> >> +			.ops = &clk_branch2_ops,
> > 
> > As discussed off-list, these clocks need to have the bi_tcxo as parent.
> > 
> > Otherwise, as far as the CCF is concerned these clocks will have rate 0,
> > which is obviously not the case.
> > 
> > Bringing this here since there is a disconnect between X Elite and
> > Glymur w.r.t this now.
> 
> 
> The ref clocks are not required to be have a parent of bi_tcxo as these
> ideally can be left enabled(as a subsystem requirement) even if HLOS
> (APSS) goes to suspend. With the bi_tcxo parent the ARC vote from
> HLOS/APSS will not allow APSS to collapse.

Is there a scenario where the APSS is collapsed and still the ref clock
needs to stay enabled ? Sorry, this doesn't make sense to me.

> 
> If any consumers needs the clock rate, the driver should take the
> BI_TCXO handle.

This kind of breaks the CCF design. If the ref clock is a gate of the
bi_tcxo HW-wise, then not marking it so in CCF is wrong. Passing the 
bi_tcxo to the PHYs separately because of this, makes the assumption that
the PHY drivers should know not to disable the bi_tcxo themselves
either.

> 
> 
> -- 
> Thanks,
> Taniya Das
> 

  reply	other threads:[~2025-08-01  5:31 UTC|newest]

Thread overview: 36+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-07-29  5:42 [PATCH v3 0/7] Add support for Clock controllers for Glymur Taniya Das
2025-07-29  5:42 ` [PATCH v3 1/7] dt-bindings: clock: qcom-rpmhcc: Add support for Glymur SoCs Taniya Das
2025-07-30  7:15   ` Krzysztof Kozlowski
2025-07-29  5:42 ` [PATCH v3 2/7] dt-bindings: clock: qcom: Document the Glymur TCSR Clock Controller Taniya Das
2025-07-30  7:17   ` Krzysztof Kozlowski
2025-08-01  4:14     ` Taniya Das
2025-08-01  7:28       ` Dmitry Baryshkov
2025-08-01  9:10       ` Krzysztof Kozlowski
2025-08-04  9:01         ` Taniya Das
2025-08-06  9:57         ` Taniya Das
2025-08-06 10:00           ` Krzysztof Kozlowski
2025-07-29  5:42 ` [PATCH v3 3/7] clk: qcom: Add TCSR clock driver for Glymur Taniya Das
2025-07-29 10:49   ` Dmitry Baryshkov
2025-07-30 11:25   ` Abel Vesa
2025-08-01  4:32     ` Taniya Das
2025-08-01  5:31       ` Abel Vesa [this message]
2025-08-01 11:54         ` Konrad Dybcio
2025-08-04  9:00           ` Taniya Das
2025-08-04  9:36             ` Abel Vesa
2025-08-04 13:10             ` Konrad Dybcio
2025-08-04 14:21               ` Taniya Das
2025-08-06 10:04                 ` Konrad Dybcio
2025-08-06 10:21                   ` Taniya Das
2025-08-07 13:07                     ` Konrad Dybcio
2025-08-08  9:54                       ` Taniya Das
2025-07-29  5:42 ` [PATCH v3 4/7] clk: qcom: rpmh: Add support for Glymur rpmh clocks Taniya Das
2025-07-29 10:48   ` Dmitry Baryshkov
2025-07-29  5:42 ` [PATCH v3 5/7] clk: qcom: clk-alpha-pll: Add support for Taycan EKO_T PLL Taniya Das
2025-07-29  5:42 ` [PATCH v3 6/7] dt-bindings: clock: qcom: document the Glymur Global Clock Controller Taniya Das
2025-07-29  5:42 ` [PATCH v3 7/7] clk: qcom: gcc: Add support for " Taniya Das
2025-07-29 10:01   ` Konrad Dybcio
2025-07-29 10:48   ` Dmitry Baryshkov
2025-07-29 10:49     ` Konrad Dybcio
2025-08-01  4:25       ` Taniya Das
2025-07-30  7:15 ` [PATCH v3 0/7] Add support for Clock controllers for Glymur Krzysztof Kozlowski
2025-07-31 10:25   ` Taniya Das

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