From: Rodrigo Vivi <rodrigo.vivi@intel.com>
To: Jani Nikula <jani.nikula@intel.com>
Cc: <intel-gfx@lists.freedesktop.org>, <intel-xe@lists.freedesktop.org>
Subject: Re: [PATCH 4/5] drm/i915/dram: bypass fsb/mem freq detection on dg2 and no display
Date: Fri, 15 Aug 2025 11:43:03 -0400 [thread overview]
Message-ID: <aJ9Vh-HF-vz2vU1e@intel.com> (raw)
In-Reply-To: <d18558149f62c87be70d183b6f41d11e0092cf4a@intel.com>
On Wed, Aug 06, 2025 at 04:52:06PM +0300, Jani Nikula wrote:
> On Tue, 05 Aug 2025, Rodrigo Vivi <rodrigo.vivi@intel.com> wrote:
> > On Thu, Jul 31, 2025 at 05:21:24PM +0300, Jani Nikula wrote:
> >> Non-display now calls the intel_fsb_freq() and intel_mem_freq()
> >> functions, so we don't have to have the frequencies initialized for dg2
> >> or non-display cases.
>
> Is this enough amendmend for the commit message:
>
> """
> This is in preparation for unifying the pre-gen9 handling in dram info.
>
> DG2 remains a special case as described in commit 5eb6bf0b44e7
> ("drm/i915/dg2: Don't read DRAM info").
> """
>
> Or do you want more?
this is great, with that
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
>
> BR,
> Jani.
>
> >>
> >> Signed-off-by: Jani Nikula <jani.nikula@intel.com>
> >> ---
> >> drivers/gpu/drm/i915/soc/intel_dram.c | 5 ++++-
> >> 1 file changed, 4 insertions(+), 1 deletion(-)
> >>
> >> diff --git a/drivers/gpu/drm/i915/soc/intel_dram.c b/drivers/gpu/drm/i915/soc/intel_dram.c
> >> index 193e7f71a356..d896fb67270f 100644
> >> --- a/drivers/gpu/drm/i915/soc/intel_dram.c
> >> +++ b/drivers/gpu/drm/i915/soc/intel_dram.c
> >> @@ -725,10 +725,13 @@ int intel_dram_detect(struct drm_i915_private *i915)
> >> struct dram_info *dram_info;
> >> int ret;
> >>
> >> + if (IS_DG2(i915) || !HAS_DISPLAY(i915))
> >> + return 0;
> >> +
> >> detect_fsb_freq(i915);
> >> detect_mem_freq(i915);
> >
> > but they will only be set to zero no? do we really need to avoid it?
> > if so, perhaps make this change earlier?
> >
> > Also I wonder what's special in DG2, but not in BMG...
> >
> >>
> >> - if (GRAPHICS_VER(i915) < 9 || IS_DG2(i915) || !HAS_DISPLAY(i915))
> >> + if (GRAPHICS_VER(i915) < 9)
> >
> > what about the old gen remaining here? at least deserves a comment on why
> > it needs the upper calls, but not the call bellow? or should the upper
> > calls be in another function/flow?
> >
> >> return 0;
> >>
> >> dram_info = drmm_kzalloc(&i915->drm, sizeof(*dram_info), GFP_KERNEL);
> >> --
> >> 2.39.5
> >>
>
> --
> Jani Nikula, Intel
next prev parent reply other threads:[~2025-08-15 15:43 UTC|newest]
Thread overview: 19+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-07-31 14:21 [PATCH 0/5] drm/i915 and drm/xe: remove fsb/mem freq cleanups Jani Nikula
2025-07-31 14:21 ` [PATCH 1/5] drm/i915/dram: add intel_fsb_freq() and use it Jani Nikula
2025-08-05 22:17 ` Rodrigo Vivi
2025-07-31 14:21 ` [PATCH 2/5] drm/i915/dram: add intel_mem_freq() Jani Nikula
2025-08-05 22:18 ` Rodrigo Vivi
2025-07-31 14:21 ` [PATCH 3/5] drm/i915/rps: use intel_fsb_freq() and intel_mem_freq() Jani Nikula
2025-08-05 22:20 ` Rodrigo Vivi
2025-07-31 14:21 ` [PATCH 4/5] drm/i915/dram: bypass fsb/mem freq detection on dg2 and no display Jani Nikula
2025-08-05 22:24 ` Rodrigo Vivi
2025-08-06 13:52 ` Jani Nikula
2025-08-15 15:43 ` Rodrigo Vivi [this message]
2025-07-31 14:21 ` [PATCH 5/5] drm/i915/dram: move fsb_freq and mem_freq to dram info Jani Nikula
2025-08-05 22:28 ` Rodrigo Vivi
2025-08-06 13:57 ` Jani Nikula
2025-08-15 15:49 ` Rodrigo Vivi
2025-07-31 16:58 ` ✗ i915.CI.BAT: failure for drm/i915 and drm/xe: remove fsb/mem freq cleanups Patchwork
2025-07-31 18:26 ` ✓ CI.KUnit: success " Patchwork
2025-07-31 19:44 ` ✓ Xe.CI.BAT: " Patchwork
2025-07-31 21:01 ` ✗ Xe.CI.Full: failure " Patchwork
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