From: Saket Kumar Bhaskar <skb99@linux.ibm.com>
To: Christophe Leroy <christophe.leroy@csgroup.eu>
Cc: bpf@vger.kernel.org, linuxppc-dev@lists.ozlabs.org,
linux-kselftest@vger.kernel.org, linux-kernel@vger.kernel.org,
hbathini@linux.ibm.com, sachinpb@linux.ibm.com,
venkat88@linux.ibm.com, andrii@kernel.org, eddyz87@gmail.com,
mykolal@fb.com, ast@kernel.org, daniel@iogearbox.net,
martin.lau@linux.dev, song@kernel.org, yonghong.song@linux.dev,
john.fastabend@gmail.com, kpsingh@kernel.org, sdf@fomichev.me,
haoluo@google.com, jolsa@kernel.org, naveen@kernel.org,
maddy@linux.ibm.com, mpe@ellerman.id.au, npiggin@gmail.com,
memxor@gmail.com, iii@linux.ibm.com, shuah@kernel.org
Subject: Re: [bpf-next 3/6] bpf,powerpc: Implement bpf_addr_space_cast instruction
Date: Thu, 7 Aug 2025 15:54:50 +0530 [thread overview]
Message-ID: <aJR+8t1CnEig3exH@linux.ibm.com> (raw)
In-Reply-To: <bc6ef2d1-da06-4b29-a0ec-67549074bc0b@csgroup.eu>
On Tue, Aug 05, 2025 at 09:29:07AM +0200, Christophe Leroy wrote:
>
>
> Le 05/08/2025 à 08:27, Saket Kumar Bhaskar a écrit :
> > LLVM generates bpf_addr_space_cast instruction while translating
> > pointers between native (zero) address space and
> > __attribute__((address_space(N))). The addr_space=0 is reserved as
> > bpf_arena address space.
> >
> > rY = addr_space_cast(rX, 0, 1) is processed by the verifier and
> > converted to normal 32-bit move: wX = wY.
> >
> > rY = addr_space_cast(rX, 1, 0) : used to convert a bpf arena pointer to
> > a pointer in the userspace vma. This has to be converted by the JIT.
> >
> > Signed-off-by: Saket Kumar Bhaskar <skb99@linux.ibm.com>
> > ---
> > arch/powerpc/net/bpf_jit.h | 1 +
> > arch/powerpc/net/bpf_jit_comp.c | 6 ++++++
> > arch/powerpc/net/bpf_jit_comp64.c | 11 +++++++++++
> > 3 files changed, 18 insertions(+)
> >
> > diff --git a/arch/powerpc/net/bpf_jit.h b/arch/powerpc/net/bpf_jit.h
> > index 2d095a873305..748e30e8b5b4 100644
> > --- a/arch/powerpc/net/bpf_jit.h
> > +++ b/arch/powerpc/net/bpf_jit.h
> > @@ -165,6 +165,7 @@ struct codegen_context {
> > unsigned int exentry_idx;
> > unsigned int alt_exit_addr;
> > u64 arena_vm_start;
> > + u64 user_vm_start;
> > };
> > #define bpf_to_ppc(r) (ctx->b2p[r])
> > diff --git a/arch/powerpc/net/bpf_jit_comp.c b/arch/powerpc/net/bpf_jit_comp.c
> > index 35bfdf4d8785..2b3f90930c27 100644
> > --- a/arch/powerpc/net/bpf_jit_comp.c
> > +++ b/arch/powerpc/net/bpf_jit_comp.c
> > @@ -205,6 +205,7 @@ struct bpf_prog *bpf_int_jit_compile(struct bpf_prog *fp)
> > /* Make sure that the stack is quadword aligned. */
> > cgctx.stack_size = round_up(fp->aux->stack_depth, 16);
> > cgctx.arena_vm_start = bpf_arena_get_kern_vm_start(fp->aux->arena);
> > + cgctx.user_vm_start = bpf_arena_get_user_vm_start(fp->aux->arena);
> > /* Scouting faux-generate pass 0 */
> > if (bpf_jit_build_body(fp, NULL, NULL, &cgctx, addrs, 0, false)) {
> > @@ -441,6 +442,11 @@ bool bpf_jit_supports_kfunc_call(void)
> > return true;
> > }
> > +bool bpf_jit_supports_arena(void)
> > +{
> > + return IS_ENABLED(CONFIG_PPC64);
> > +}
> > +
> > bool bpf_jit_supports_far_kfunc_call(void)
> > {
> > return IS_ENABLED(CONFIG_PPC64);
> > diff --git a/arch/powerpc/net/bpf_jit_comp64.c b/arch/powerpc/net/bpf_jit_comp64.c
> > index 16e62766c757..d4fe4dacf2d6 100644
> > --- a/arch/powerpc/net/bpf_jit_comp64.c
> > +++ b/arch/powerpc/net/bpf_jit_comp64.c
> > @@ -812,6 +812,17 @@ int bpf_jit_build_body(struct bpf_prog *fp, u32 *image, u32 *fimage, struct code
> > */
> > case BPF_ALU | BPF_MOV | BPF_X: /* (u32) dst = src */
> > case BPF_ALU64 | BPF_MOV | BPF_X: /* dst = src */
> > +
> > + if (insn_is_cast_user(&insn[i])) {
> > + EMIT(PPC_RAW_RLDICL(tmp1_reg, src_reg, 0, 32));
>
> Define and use PPC_RAW_RLDICL_DOT to avoid the CMPDI below.
>
Alright Chris, will define and implement it here.
> > + PPC_LI64(dst_reg, (ctx->user_vm_start & 0xffffffff00000000UL));
> > + EMIT(PPC_RAW_CMPDI(tmp1_reg, 0));
> > + PPC_BCC_SHORT(COND_EQ, (ctx->idx + 2) * 4);
> > + EMIT(PPC_RAW_OR(tmp1_reg, dst_reg, tmp1_reg));
> > + EMIT(PPC_RAW_MR(dst_reg, tmp1_reg));
> > + break;
> > + }
> > +
> > if (imm == 1) {
> > /* special mov32 for zext */
> > EMIT(PPC_RAW_RLWINM(dst_reg, dst_reg, 0, 0, 31));
>
next prev parent reply other threads:[~2025-08-07 10:25 UTC|newest]
Thread overview: 23+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-08-05 6:27 [bpf-next 0/6] bpf,powerpc: Add support for bpf arena and arena atomics Saket Kumar Bhaskar
2025-08-05 6:27 ` [bpf-next 1/6] bpf,powerpc: Introduce bpf_jit_emit_probe_mem_store() to emit store instructions Saket Kumar Bhaskar
2025-08-05 7:34 ` Christophe Leroy
2025-08-05 11:59 ` Venkat Rao Bagalkote
2025-08-06 6:59 ` Christophe Leroy
2025-08-07 10:29 ` Saket Kumar Bhaskar
2025-08-05 6:27 ` [bpf-next 2/6] bpf,powerpc: Implement PROBE_MEM32 pseudo instructions Saket Kumar Bhaskar
2025-08-05 7:41 ` Christophe Leroy
2025-08-07 13:25 ` Saket Kumar Bhaskar
2025-08-14 8:54 ` Hari Bathini
2025-08-05 6:27 ` [bpf-next 3/6] bpf,powerpc: Implement bpf_addr_space_cast instruction Saket Kumar Bhaskar
2025-08-05 7:29 ` Christophe Leroy
2025-08-07 10:24 ` Saket Kumar Bhaskar [this message]
2025-08-05 6:27 ` [bpf-next 4/6] bpf,powerpc: Introduce bpf_jit_emit_atomic_ops() to emit atomic instructions Saket Kumar Bhaskar
2025-08-05 6:27 ` [bpf-next 5/6] bpf,powerpc: Implement PROBE_ATOMIC instructions Saket Kumar Bhaskar
2025-08-05 6:27 ` [bpf-next 6/6] selftests/bpf: Fix arena_spin_lock selftest failure Saket Kumar Bhaskar
2025-08-07 22:21 ` Alexei Starovoitov
2025-08-08 15:28 ` Saket Kumar Bhaskar
2025-08-08 16:27 ` Alexei Starovoitov
2025-08-05 7:45 ` [bpf-next 0/6] bpf,powerpc: Add support for bpf arena and arena atomics Christophe Leroy
2025-08-07 10:26 ` Saket Kumar Bhaskar
2025-08-05 12:07 ` Venkat Rao Bagalkote
2025-08-07 13:17 ` Saket Kumar Bhaskar
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