Re: [PATCH 3/4] irqchip/sg2042-msi: Fix broken affinity setting

[Andy Shevchenko <andriy.shevchenko@intel.com>]

On Tue, Aug 12, 2025 at 06:37:35AM +0800, Inochi Amaoto wrote:
> On Mon, Aug 11, 2025 at 04:43:00PM +0200, Andy Shevchenko wrote:
> > On Thu, Aug 07, 2025 at 07:23:24PM +0800, Inochi Amaoto wrote:
> > > When using NVME on SG2044, the NVME always complains "I/O tag XXX
> > > (XXX) QID XX timeout, completion polled", which is caused by the
> > > broken handler of the sg2042-msi driver.
> > > 
> > > As PLIC driver can only setting affinity when enabling, the sg2042-msi
> > > does not properly handled affinity setting previously and enable irq in
> > > an unexpected executing path.
> > > 
> > > Since the PCI template domain supports irq_startup/irq_shutdown, set
> > > irq_chip_[startup/shutdown]_parent for irq_startup/irq_shutdown. So
> > > the irq can be started properly.
> > 
> > > Fixes: e96b93a97c90 ("irqchip/sg2042-msi: Add the Sophgo SG2044 MSI interrupt controller")
> > > Reported-by: Han Gao <rabenda.cn@gmail.com>
> > 
> > Closes ?
> 
> I got a direct private email from Han, so I think there is no pulic
> Closes.

It's better to follow current practise (by at least some of the fix code
authors) to make this as a comment in the patch (text, that goes after '---'
but before actual diff).

No need to resent just for that, as you basically explained it here.
(but it seems we will have a new version anyway)

-- 
With Best Regards,
Andy Shevchenko