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From: Zhao Liu <zhao1.liu@intel.com>
To: Igor Mammedov <imammedo@redhat.com>
Cc: qemu-devel@nongnu.org, pbonzini@redhat.com, peterx@redhat.com,
	mst@redhat.com, mtosatti@redhat.com,
	richard.henderson@linaro.org, riku.voipio@iki.fi,
	thuth@redhat.com, pasic@linux.ibm.com, borntraeger@linux.ibm.com,
	david@redhat.com, jjherne@linux.ibm.com, shorne@gmail.com,
	eduardo@habkost.net, marcel.apfelbaum@gmail.com,
	philmd@linaro.org, wangyanan55@huawei.com,
	peter.maydell@linaro.org, agraf@csgraf.de, mads@ynddal.dk,
	mrolnik@gmail.com, deller@gmx.de, dirty@apple.com,
	rbolshakov@ddn.com, phil@philjordan.eu, reinoud@netbsd.org,
	sunilmut@microsoft.com, gaosong@loongson.cn, laurent@vivier.eu,
	edgar.iglesias@gmail.com, aurelien@aurel32.net,
	jiaxun.yang@flygoat.com, arikalo@gmail.com,
	chenhuacai@kernel.org, npiggin@gmail.com, rathc@linux.ibm.com,
	harshpb@linux.ibm.com, yoshinori.sato@nifty.com,
	iii@linux.ibm.com, mark.cave-ayland@ilande.co.uk,
	atar4qemu@gmail.com, qemu-s390x@nongnu.org, qemu-arm@nongnu.org,
	qemu-ppc@nongnu.org
Subject: Re: [PATCH v5 6/8] add cpu_test_interrupt()/cpu_set_interrupt() helpers and use them tree wide
Date: Tue, 26 Aug 2025 17:27:27 +0800	[thread overview]
Message-ID: <aK19/6P9325hYBO9@intel.com> (raw)
In-Reply-To: <20250826104731.1440e3ed@fedora>

> > Behind this helper, I mainly considerred the case of multiple writers:
> > 
> >    thread 0      .        thread 1
> >                  .
> > load:  x         .
> > OR:    x | a     .
> >                  .
> >                  .      load:  x
> >                  .      OR:    x | b
> >                  .      store: x | b
> >                  .
> > store: x | a     .      (x | b is missed)
> > 
> > In the above case, "load" means the direct access:
> > cpu->interrupt_request w/o protection, and "store" is done by
> > qatomic_store_release.
> > 
> > The memory order is guaranteed, but the operation result of thread 1
> > seems lost. Only BQL or other mutex could avoid such case.
> > 
> > qatomic_store_release is already a great step to avoid issues outside
> > BQL, so I'm not sure if it's worth going further to ensure atomicity,
> > especifically for multiple writers (my initial understanding is that
> > iothread or callback may have multiple writers, but I'm also a bit
> > unsure.). The overhead is also indeed an issue.
> 
> it looks like we are always holding BQL when setting interrupt.
>
> However currently we also have places that check interrupts
> without BQL but without using any atomics. This patch aims to ensure
> that proper barriers are in place when checking for interrupts
> and introduces release/acquire pair helpers for cpu->interrupt_request,
> to ensure it's don consistently.

I see. this makes sense and qatomic_store_release is enough. 

> While overhead might be issue, it's better to have correcteness 1st.
> (that's why blanket tree wide change to make sure we don't miss places that
> set/test interrupts).
> 
> Then if performance issues were found somewhere, as was suggested
> in previous reviews, we may opencode that place without barriers
> with a mandatory comment/justification why it's okey doing so.
> (well, at least that's the plan)

I agree (and sorry for my misleading words; my initial thought is
qatomic_fetch_or has worse perfermance.)

Thanks,
Zhao



  reply	other threads:[~2025-08-26  9:07 UTC|newest]

Thread overview: 34+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-08-14 16:05 [PATCH v4 0/8] Reinvent BQL-free PIO/MMIO Igor Mammedov
2025-08-14 16:05 ` [PATCH v4 1/8] memory: reintroduce BQL-free fine-grained PIO/MMIO Igor Mammedov
2025-08-25 10:55   ` Philippe Mathieu-Daudé
2025-08-14 16:05 ` [PATCH v4 2/8] acpi: mark PMTIMER as unlocked Igor Mammedov
2025-08-14 16:05 ` [PATCH v4 3/8] hpet: switch to fain-grained device locking Igor Mammedov
2025-08-25 14:43   ` Zhao Liu
2025-08-14 16:05 ` [PATCH v4 4/8] hpet: move out main counter read into a separate block Igor Mammedov
2025-08-25 14:44   ` Zhao Liu
2025-08-14 16:05 ` [PATCH v4 5/8] hpet: make main counter read lock-less Igor Mammedov
2025-08-25 14:55   ` Zhao Liu
2025-08-25 15:10     ` Igor Mammedov
2025-08-14 16:05 ` [PATCH v4 6/8] add cpu_test_interrupt()/cpu_set_interrupt() helpers and use them tree wide Igor Mammedov
2025-08-14 19:05   ` Peter Xu
2025-08-20 15:01   ` Jason J. Herne
2025-08-21 15:57     ` Igor Mammedov
2025-08-21 15:56   ` [PATCH v5 " Igor Mammedov
2025-08-25  8:16     ` Harsh Prateek Bora
2025-08-25 15:06       ` Igor Mammedov
2025-08-25 10:35     ` Philippe Mathieu-Daudé
2025-08-25 15:02       ` Igor Mammedov
2025-08-25 15:28     ` Zhao Liu
2025-08-25 15:19       ` Igor Mammedov
2025-08-26  7:45         ` Zhao Liu
2025-08-26  8:47           ` Igor Mammedov
2025-08-26  9:27             ` Zhao Liu [this message]
2025-08-29  8:18             ` Paolo Bonzini
2025-08-29 12:33               ` Paolo Bonzini
2025-09-01 12:05                 ` Igor Mammedov
2025-09-01 12:06                   ` Paolo Bonzini
2025-08-14 16:05 ` [PATCH v4 7/8] kvm: i386: irqchip: take BQL only if there is an interrupt Igor Mammedov
2025-08-25 10:46   ` Philippe Mathieu-Daudé
2025-08-27  8:40     ` Igor Mammedov
2025-08-14 16:06 ` [PATCH v4 8/8] tcg: move interrupt caching and single step masking closer to user Igor Mammedov
2025-08-29  8:19 ` [PATCH v4 0/8] Reinvent BQL-free PIO/MMIO Paolo Bonzini

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