From: Rodrigo Vivi <rodrigo.vivi@intel.com>
To: Xin Wang <x.wang@intel.com>
Cc: <intel-xe@lists.freedesktop.org>, <karthik.poosa@intel.com>,
<james.xiong@intel.com>, <stuart.summers@intel.com>,
<shuicheng.lin@intel.com>, <vinay.belgaumkar@intel.com>
Subject: Re: [PATCH 1/3] drm/xe: early-return for SR-IOV VF in C6 funcs
Date: Tue, 26 Aug 2025 10:19:55 -0400 [thread overview]
Message-ID: <aK3Ci5wSvj4-JrWg@intel.com> (raw)
In-Reply-To: <20250825223219.1351786-2-x.wang@intel.com>
On Mon, Aug 25, 2025 at 03:32:17PM -0700, Xin Wang wrote:
> VF drivers can't access any of gtidle control registers. By
> returning early when IS_SRIOV_VF() is true, we avoid executing
> the assertions.
>
> Suggested-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
I haven't suggested this patch. The only suggestion I gave was if you
really want to touch the xe_device_assert_mem_access that you should
do in a separate patch with proper justification.
The justification above still doesn't explain why you want so badly
to remove of move the xe_device_assert_mem_access.
Better to just give up on this and simply do not touch the
xe_device_assert_mem_access
Thanks,
Rodrigo.
> Signed-off-by: Xin Wang <x.wang@intel.com>
> ---
> drivers/gpu/drm/xe/xe_gt_idle.c | 12 ++++++------
> 1 file changed, 6 insertions(+), 6 deletions(-)
>
> diff --git a/drivers/gpu/drm/xe/xe_gt_idle.c b/drivers/gpu/drm/xe/xe_gt_idle.c
> index ffb210216aa9..611c506bdad1 100644
> --- a/drivers/gpu/drm/xe/xe_gt_idle.c
> +++ b/drivers/gpu/drm/xe/xe_gt_idle.c
> @@ -377,12 +377,12 @@ int xe_gt_idle_init(struct xe_gt_idle *gtidle)
>
> void xe_gt_idle_enable_c6(struct xe_gt *gt)
> {
> - xe_device_assert_mem_access(gt_to_xe(gt));
> - xe_force_wake_assert_held(gt_to_fw(gt), XE_FW_GT);
> -
> if (IS_SRIOV_VF(gt_to_xe(gt)))
> return;
>
> + xe_device_assert_mem_access(gt_to_xe(gt));
> + xe_force_wake_assert_held(gt_to_fw(gt), XE_FW_GT);
> +
> /* Units of 1280 ns for a total of 5s */
> xe_mmio_write32(>->mmio, RC_IDLE_HYSTERSIS, 0x3B9ACA);
> /* Enable RC6 */
> @@ -392,12 +392,12 @@ void xe_gt_idle_enable_c6(struct xe_gt *gt)
>
> void xe_gt_idle_disable_c6(struct xe_gt *gt)
> {
> - xe_device_assert_mem_access(gt_to_xe(gt));
> - xe_force_wake_assert_held(gt_to_fw(gt), XE_FW_GT);
> -
> if (IS_SRIOV_VF(gt_to_xe(gt)))
> return;
>
> + xe_device_assert_mem_access(gt_to_xe(gt));
> + xe_force_wake_assert_held(gt_to_fw(gt), XE_FW_GT);
> +
> xe_mmio_write32(>->mmio, RC_CONTROL, 0);
> xe_mmio_write32(>->mmio, RC_STATE, 0);
> }
> --
> 2.43.0
>
next prev parent reply other threads:[~2025-08-26 14:20 UTC|newest]
Thread overview: 9+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-08-25 22:32 [PATCH 0/3] Ensure GT is in C0 during resumes Xin Wang
2025-08-25 22:32 ` [PATCH 1/3] drm/xe: early-return for SR-IOV VF in C6 funcs Xin Wang
2025-08-26 14:19 ` Rodrigo Vivi [this message]
2025-08-26 16:25 ` Wang, X
2025-08-25 22:32 ` [PATCH 2/3] drm/xe: make xe_gt_idle_disable_c6() handle the forcewake internally Xin Wang
2025-08-25 22:32 ` [PATCH 3/3] drm/xe: Ensure GT is in C0 during resumes Xin Wang
2025-08-25 22:39 ` ✓ CI.KUnit: success for Ensure GT is in C0 during resumes (rev3) Patchwork
2025-08-25 23:34 ` ✓ Xe.CI.BAT: " Patchwork
2025-08-26 8:05 ` ✗ Xe.CI.Full: failure " Patchwork
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