From: Dave Martin <Dave.Martin@arm.com>
To: Yeoreum Yun <yeoreum.yun@arm.com>
Cc: catalin.marinas@arm.com, will@kernel.org, broonie@kernel.org,
oliver.upton@linux.dev, anshuman.khandual@arm.com,
robh@kernel.org, james.morse@arm.com, mark.rutland@arm.com,
joey.gouly@arm.com, ahmed.genidi@arm.com, kevin.brodsky@arm.com,
scott@os.amperecomputing.com, mbenes@suse.cz,
james.clark@linaro.org, frederic@kernel.org, rafael@kernel.org,
pavel@kernel.org, ryan.roberts@arm.com, suzuki.poulose@arm.com,
linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org, linux-pm@vger.kernel.org,
kvmarm@lists.linux.dev
Subject: Re: [PATCH v3 5/5] arm64: make the per-task SCTLR2_EL1
Date: Wed, 20 Aug 2025 16:11:38 +0100 [thread overview]
Message-ID: <aKXlqsnLyTL6lsh5@e133380.arm.com> (raw)
In-Reply-To: <20250813120118.3953541-6-yeoreum.yun@arm.com>
Hi,
On Wed, Aug 13, 2025 at 01:01:18PM +0100, Yeoreum Yun wrote:
> SCTLR2_EL1 register is optional starting from ARMv8.8/ARMv9.3,
> and becomes mandatory from ARMv8.9/ARMv9.4
> and serveral architectural feature are controled by bits in
> these registers and some of bits could be configurable per task
> not globally -- i.e) FEAT_CPA2 related field and etc.
>
> For future usage of these fields, make the per-task SCTLR2_EL1.
It is worth pointing out the impact of this: for platforms without
FEAT_SCTLR2 support, there is no functional change and minimal
performance overhead.
> Signed-off-by: Yeoreum Yun <yeoreum.yun@arm.com>
> ---
> arch/arm64/include/asm/processor.h | 5 +++++
> arch/arm64/kernel/process.c | 9 +++++++++
> 2 files changed, 14 insertions(+)
>
> diff --git a/arch/arm64/include/asm/processor.h b/arch/arm64/include/asm/processor.h
> index 61d62bfd5a7b..2c962816de70 100644
> --- a/arch/arm64/include/asm/processor.h
> +++ b/arch/arm64/include/asm/processor.h
> @@ -184,6 +184,7 @@ struct thread_struct {
> u64 mte_ctrl;
> #endif
> u64 sctlr_user;
> + u64 sctlr2_user;
> u64 svcr;
> u64 tpidr2_el0;
> u64 por_el0;
> @@ -258,6 +259,9 @@ static inline void task_set_sve_vl_onexec(struct task_struct *task,
> (SCTLR_ELx_ENIA | SCTLR_ELx_ENIB | SCTLR_ELx_ENDA | SCTLR_ELx_ENDB | \
> SCTLR_EL1_TCF0_MASK)
>
> +#define SCTLR2_USER_MASK \
> + (SCTLR2_EL1_EnPACM0 | SCTLR2_EL1_CPTA0 | SCTLR2_EL1_CPTM0)
> +
The kernel doesn't know about any of these features, yet.
It's probably better to make this 0 for this patch series, and add bits
to this mask only when they are needed / used.
> static inline void arch_thread_struct_whitelist(unsigned long *offset,
> unsigned long *size)
> {
> @@ -370,6 +374,7 @@ struct task_struct;
> unsigned long __get_wchan(struct task_struct *p);
>
> void update_sctlr_el1(u64 sctlr);
> +void update_sctlr2_el1(u64 sctlr2);
Is this function used outside process.c yet? If not, you can drop this
declaration and [... below ...]
>
> /* Thread switching */
> extern struct task_struct *cpu_switch_to(struct task_struct *prev,
> diff --git a/arch/arm64/kernel/process.c b/arch/arm64/kernel/process.c
> index 96482a1412c6..9191180c4875 100644
> --- a/arch/arm64/kernel/process.c
> +++ b/arch/arm64/kernel/process.c
> @@ -698,6 +698,11 @@ void update_sctlr_el1(u64 sctlr)
> isb();
> }
>
> +void update_sctlr2_el1(u64 sctlr2)
[...] make the function static here.
> +{
> + sysreg_clear_set_s(SYS_SCTLR2_EL1, SCTLR2_USER_MASK, sctlr2);
> +}
> +
> /*
> * Thread switching.
> */
> @@ -737,6 +742,10 @@ struct task_struct *__switch_to(struct task_struct *prev,
> if (prev->thread.sctlr_user != next->thread.sctlr_user)
> update_sctlr_el1(next->thread.sctlr_user);
>
> + if (alternative_has_cap_unlikely(ARM64_HAS_SCTLR2) &&
> + prev->thread.sctlr2_user != next->thread.sctlr2_user)
> + update_sctlr2_el1(next->thread.sctlr2_user);
> +
> /* the actual thread switch */
> last = cpu_switch_to(prev, next);
[...]
Otherwise, I guess this looks OK.
Cheers
---Dave
next prev parent reply other threads:[~2025-08-20 15:11 UTC|newest]
Thread overview: 19+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-08-13 12:01 [PATCH v3 0/5] initialize SCTRL2_ELx Yeoreum Yun
2025-08-13 12:01 ` [PATCH v3 1/5] arm64: make SCTLR2_EL1 accessible Yeoreum Yun
2025-08-20 15:10 ` Dave Martin
2025-08-20 18:51 ` Yeoreum Yun
2025-08-13 12:01 ` [PATCH v3 2/5] arm64: initialise SCTLR2_ELx register at boot time Yeoreum Yun
2025-08-20 15:10 ` Dave Martin
2025-08-20 17:18 ` Yeoreum Yun
2025-08-13 12:01 ` [PATCH v3 3/5] arm64: save/restore SCTLR2_EL1 when cpu_suspend()/resume() Yeoreum Yun
2025-08-20 15:11 ` Dave Martin
2025-08-20 17:22 ` Yeoreum Yun
2025-08-13 12:01 ` [PATCH v3 4/5] arm64: initialise SCTLR2_EL1 at cpu_soft_restart() Yeoreum Yun
2025-08-20 15:11 ` Dave Martin
2025-08-20 17:32 ` Yeoreum Yun
2025-09-01 15:01 ` Dave Martin
2025-08-21 10:14 ` Yeoreum Yun
2025-08-13 12:01 ` [PATCH v3 5/5] arm64: make the per-task SCTLR2_EL1 Yeoreum Yun
2025-08-20 15:11 ` Dave Martin [this message]
2025-08-20 17:34 ` Yeoreum Yun
2025-08-20 15:11 ` [PATCH v3 0/5] initialize SCTRL2_ELx Dave Martin
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