From: Oliver Upton <oliver.upton@linux.dev>
To: Wei-Lin Chang <r09922117@csie.ntu.edu.tw>
Cc: linux-arm-kernel@lists.infradead.org, kvmarm@lists.linux.dev,
linux-kernel@vger.kernel.org, Marc Zyngier <maz@kernel.org>,
Joey Gouly <joey.gouly@arm.com>,
Suzuki K Poulose <suzuki.poulose@arm.com>,
Zenghui Yu <yuzenghui@huawei.com>,
Catalin Marinas <catalin.marinas@arm.com>,
Will Deacon <will@kernel.org>
Subject: Re: [PATCH] KVM: arm64: nv: Allow shadow stage 2 read fault
Date: Fri, 22 Aug 2025 02:25:43 -0700 [thread overview]
Message-ID: <aKg3l23hheuQ1dJH@linux.dev> (raw)
In-Reply-To: <20250822031853.2007437-1-r09922117@csie.ntu.edu.tw>
Hi Wei-Lin,
You've been finding some good stuff with nested, thank you :)
On Fri, Aug 22, 2025 at 11:18:53AM +0800, Wei-Lin Chang wrote:
> I am able to trigger this error with a modified L1 KVM, but I do realize
> this requires L1 to be very strange (or even just wrong) so I understand
> if we don't want to handle this kind of edge case. On the other hand,
> could there also be other ways to trigger this that I have not thought
> of?
The architecture is pretty unambiguous here that the stage-2 can
represent a translation w/o read permission.
> Another thing is that this change lets L1 get away with not flushing the
> TLB, but TLBs are ephemeral so it's fine in this aspect, however I'm not
> sure if there are other considerations.
FEAT_ETS3 is an interesting one since it provides software with ordering
expectations around MMU faults (including permission faults) and updates
to the translation tables. For KVM's shadow stage-2 to comply we need to
re-walk the guest's stage-2 before injecting the fault at L1.
> ---
> arch/arm64/kvm/mmu.c | 4 ++--
> 1 file changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/arch/arm64/kvm/mmu.c b/arch/arm64/kvm/mmu.c
> index 1c78864767c5c..41017ca579b19 100644
> --- a/arch/arm64/kvm/mmu.c
> +++ b/arch/arm64/kvm/mmu.c
> @@ -1508,8 +1508,8 @@ static int user_mem_abort(struct kvm_vcpu *vcpu, phys_addr_t fault_ipa,
> exec_fault = kvm_vcpu_trap_is_exec_fault(vcpu);
> VM_BUG_ON(write_fault && exec_fault);
>
> - if (fault_is_perm && !write_fault && !exec_fault) {
> - kvm_err("Unexpected L2 read permission error\n");
> + if (fault_is_perm && !write_fault && !exec_fault && !nested) {
> + kvm_err("Unexpected S2 read permission error\n");
> return -EFAULT;
> }
Hmm... I'm also willing to just delete this check altogether. The
likelihood of KVM creating a stage-2 PTE w/o read permission is rather
low.
Thanks,
Oliver
next prev parent reply other threads:[~2025-08-22 9:25 UTC|newest]
Thread overview: 7+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-08-22 3:18 [PATCH] KVM: arm64: nv: Allow shadow stage 2 read fault Wei-Lin Chang
2025-08-22 9:25 ` Oliver Upton [this message]
2025-08-26 13:55 ` Wei-Lin Chang
2025-08-22 9:40 ` Marc Zyngier
2025-08-26 13:49 ` Wei-Lin Chang
2025-09-01 11:06 ` Marc Zyngier
2025-09-07 9:39 ` Wei-Lin Chang
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