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From: Denzeel Oliva <wachiturroxd150@gmail.com>
To: Conor Dooley <conor@kernel.org>
Cc: Krzysztof Kozlowski <krzk@kernel.org>,
	Sylwester Nawrocki <s.nawrocki@samsung.com>,
	Chanwoo Choi <cw00.choi@samsung.com>,
	Alim Akhtar <alim.akhtar@samsung.com>,
	Michael Turquette <mturquette@baylibre.com>,
	Stephen Boyd <sboyd@kernel.org>, Rob Herring <robh@kernel.org>,
	Conor Dooley <conor+dt@kernel.org>,
	linux-samsung-soc@vger.kernel.org, linux-clk@vger.kernel.org,
	linux-arm-kernel@lists.infradead.org,
	linux-kernel@vger.kernel.org, devicetree@vger.kernel.org
Subject: Re: [PATCH v2 2/3] dt-bindings: clock: exynos990: Reorder IDs clocks and extend
Date: Sat, 23 Aug 2025 17:27:29 +0000	[thread overview]
Message-ID: <aKn6AYIAG9eUeSx2@codespaces-a28d22> (raw)
In-Reply-To: <20250820-diffused-impaired-ba776d39692f@spud>

> This looks like a massive ABI break, where is the justification for
> doing it?
>
> Cheers,
> Conor.

Hi Conor,

I reordered because the current IDs don’t match CMU_TOP:
the PLL mux select is in PLL_CON0, not CON3, which gave wrong/low rates.
I also added DPU/CMUREF and a missing fixed-factor path to stop bad rates
and clk_summary hangs on hardware.
I’d rather fix the mapping now than keep a wrong layout.

Thanks,
Denzeel


  reply	other threads:[~2025-08-23 19:17 UTC|newest]

Thread overview: 7+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-08-20 14:57 [PATCH v2 0/3] clk: samsung: exynos990: CMU_TOP fixes (mux regs, widths, factors) Denzeel Oliva
2025-08-20 14:57 ` [PATCH v2 1/3] clk: samsung: exynos990: Fix CMU TOP mux/div widths and add fixed-factors Denzeel Oliva
2025-08-20 14:57 ` [PATCH v2 2/3] dt-bindings: clock: exynos990: Reorder IDs clocks and extend Denzeel Oliva
2025-08-20 19:29   ` Conor Dooley
2025-08-23 17:27     ` Denzeel Oliva [this message]
2025-08-24  8:16       ` Krzysztof Kozlowski
2025-08-20 14:57 ` [PATCH v2 3/3] clk: samsung: exynos990: Fix PLL mux regs, add DPU/CMUREF Denzeel Oliva

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