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From: Tommaso Merciai <tommaso.merciai.xr@bp.renesas.com>
To: Jacopo Mondi <jacopo.mondi@ideasonboard.com>
Cc: Mauro Carvalho Chehab <mchehab@kernel.org>,
	Laurent Pinchart <laurent.pinchart@ideasonboard.com>,
	Hans Verkuil <hverkuil@kernel.org>,
	Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>,
	Biju Das <biju.das.jz@bp.renesas.com>,
	Daniel Scally <dan.scally+renesas@ideasonboard.com>,
	linux-media@vger.kernel.org, linux-kernel@vger.kernel.org,
	Jacopo Mondi <jacopo.mondi+renesas@ideasonboard.com>
Subject: Re: [PATCH] media: rzg2l-cru: csi-2: Support RZ/V2H input sizes
Date: Thu, 28 Aug 2025 10:55:48 +0200	[thread overview]
Message-ID: <aLAZlDIsdVn3JWZD@tom-desktop> (raw)
In-Reply-To: <20250826-rzv2h-cru-sizes-v1-1-dbdfc54bba11@ideasonboard.com>

Hi Jacopo,
Thanks for your patch!

On Tue, Aug 26, 2025 at 12:31:42PM +0200, Jacopo Mondi wrote:
> From: Jacopo Mondi <jacopo.mondi+renesas@ideasonboard.com>
> 
> The CRU version on the RZ/V2H SoC supports larger input sizes
> (4096x4096) compared to the version on the RZ/G2L (2800x4095).
> 
> Store the per-SoC min/max sizes in the device match info and use them
> in place of the hardcoded ones.
> 
> Signed-off-by: Jacopo Mondi <jacopo.mondi+renesas@ideasonboard.com>
> ---
> Signed-off-by: Jacopo Mondi <jacopo.mondi@ideasonboard.com>

Tested on RZ/G3E:
Tested-by: Tommaso Merciai <tommaso.merciai.xr@bp.renesas.com>

Thanks & Regards,
Tommaso

> ---
>  .../media/platform/renesas/rzg2l-cru/rzg2l-csi2.c  | 34 ++++++++++++++++++----
>  1 file changed, 28 insertions(+), 6 deletions(-)
> 
> diff --git a/drivers/media/platform/renesas/rzg2l-cru/rzg2l-csi2.c b/drivers/media/platform/renesas/rzg2l-cru/rzg2l-csi2.c
> index 1520211e74185fea3bca85f36239254f6b4651db..96d17ae0048f9d88aa73bec916365f3dbc421882 100644
> --- a/drivers/media/platform/renesas/rzg2l-cru/rzg2l-csi2.c
> +++ b/drivers/media/platform/renesas/rzg2l-cru/rzg2l-csi2.c
> @@ -101,6 +101,11 @@
>  #define RZG2L_CSI2_MAX_WIDTH		2800
>  #define RZG2L_CSI2_MAX_HEIGHT		4095
>  
> +#define RZV2H_CSI2_MIN_WIDTH		320
> +#define RZV2H_CSI2_MIN_HEIGHT		240
> +#define RZV2H_CSI2_MAX_WIDTH		4096
> +#define RZV2H_CSI2_MAX_HEIGHT		4096
> +
>  #define RZG2L_CSI2_DEFAULT_WIDTH	RZG2L_CSI2_MIN_WIDTH
>  #define RZG2L_CSI2_DEFAULT_HEIGHT	RZG2L_CSI2_MIN_HEIGHT
>  #define RZG2L_CSI2_DEFAULT_FMT		MEDIA_BUS_FMT_UYVY8_1X16
> @@ -137,6 +142,10 @@ struct rzg2l_csi2_info {
>  	int (*dphy_enable)(struct rzg2l_csi2 *csi2);
>  	int (*dphy_disable)(struct rzg2l_csi2 *csi2);
>  	bool has_system_clk;
> +	unsigned int min_width;
> +	unsigned int min_height;
> +	unsigned int max_width;
> +	unsigned int max_height;
>  };
>  
>  struct rzg2l_csi2_timings {
> @@ -418,6 +427,10 @@ static const struct rzg2l_csi2_info rzg2l_csi2_info = {
>  	.dphy_enable = rzg2l_csi2_dphy_enable,
>  	.dphy_disable = rzg2l_csi2_dphy_disable,
>  	.has_system_clk = true,
> +	.min_width = RZG2L_CSI2_MIN_WIDTH,
> +	.min_height = RZG2L_CSI2_MIN_HEIGHT,
> +	.max_width = RZG2L_CSI2_MAX_WIDTH,
> +	.max_height = RZG2L_CSI2_MAX_HEIGHT,
>  };
>  
>  static int rzg2l_csi2_dphy_setting(struct v4l2_subdev *sd, bool on)
> @@ -542,6 +555,10 @@ static const struct rzg2l_csi2_info rzv2h_csi2_info = {
>  	.dphy_enable = rzv2h_csi2_dphy_enable,
>  	.dphy_disable = rzv2h_csi2_dphy_disable,
>  	.has_system_clk = false,
> +	.min_width = RZV2H_CSI2_MIN_WIDTH,
> +	.min_height = RZV2H_CSI2_MIN_HEIGHT,
> +	.max_width = RZV2H_CSI2_MAX_WIDTH,
> +	.max_height = RZV2H_CSI2_MAX_HEIGHT,
>  };
>  
>  static int rzg2l_csi2_mipi_link_setting(struct v4l2_subdev *sd, bool on)
> @@ -631,6 +648,7 @@ static int rzg2l_csi2_set_format(struct v4l2_subdev *sd,
>  				 struct v4l2_subdev_state *state,
>  				 struct v4l2_subdev_format *fmt)
>  {
> +	struct rzg2l_csi2 *csi2 = sd_to_csi2(sd);
>  	struct v4l2_mbus_framefmt *src_format;
>  	struct v4l2_mbus_framefmt *sink_format;
>  
> @@ -653,9 +671,11 @@ static int rzg2l_csi2_set_format(struct v4l2_subdev *sd,
>  	sink_format->ycbcr_enc = fmt->format.ycbcr_enc;
>  	sink_format->quantization = fmt->format.quantization;
>  	sink_format->width = clamp_t(u32, fmt->format.width,
> -				     RZG2L_CSI2_MIN_WIDTH, RZG2L_CSI2_MAX_WIDTH);
> +				     csi2->info->min_width,
> +				     csi2->info->max_width);
>  	sink_format->height = clamp_t(u32, fmt->format.height,
> -				      RZG2L_CSI2_MIN_HEIGHT, RZG2L_CSI2_MAX_HEIGHT);
> +				     csi2->info->min_height,
> +				     csi2->info->max_height);
>  	fmt->format = *sink_format;
>  
>  	/* propagate format to source pad */
> @@ -697,16 +717,18 @@ static int rzg2l_csi2_enum_frame_size(struct v4l2_subdev *sd,
>  				      struct v4l2_subdev_state *sd_state,
>  				      struct v4l2_subdev_frame_size_enum *fse)
>  {
> +	struct rzg2l_csi2 *csi2 = sd_to_csi2(sd);
> +
>  	if (fse->index != 0)
>  		return -EINVAL;
>  
>  	if (!rzg2l_csi2_code_to_fmt(fse->code))
>  		return -EINVAL;
>  
> -	fse->min_width = RZG2L_CSI2_MIN_WIDTH;
> -	fse->min_height = RZG2L_CSI2_MIN_HEIGHT;
> -	fse->max_width = RZG2L_CSI2_MAX_WIDTH;
> -	fse->max_height = RZG2L_CSI2_MAX_HEIGHT;
> +	fse->min_width = csi2->info->min_width;
> +	fse->min_height = csi2->info->min_height;
> +	fse->max_width = csi2->info->max_width;
> +	fse->max_height = csi2->info->max_height;
>  
>  	return 0;
>  }
> 
> ---
> base-commit: 16428e2449ab96cce27be6ab17b750b404c76c7c
> change-id: 20250826-rzv2h-cru-sizes-371ff5a88081
> 
> Best regards,
> -- 
> Jacopo Mondi <jacopo.mondi@ideasonboard.com>
> 

      parent reply	other threads:[~2025-08-28  8:56 UTC|newest]

Thread overview: 3+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-08-26 10:31 [PATCH] media: rzg2l-cru: csi-2: Support RZ/V2H input sizes Jacopo Mondi
2025-08-27 22:08 ` Lad, Prabhakar
2025-08-28  8:55 ` Tommaso Merciai [this message]

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