From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mgamail.intel.com (mgamail.intel.com [198.175.65.9]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 5D18D31CA5F for ; Tue, 2 Sep 2025 14:38:58 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=198.175.65.9 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1756823941; cv=none; b=GxMLnRzJsapzHa+RvPN7MH/13IE+x0aVs8e5tq1zQtIFmMz33NKLHtENbg9FWl3gXvFKWhdkOsuq+v9trI0gMlIyfU2pTfsY2hjPxLEnNP/2UKPg+ft4DTLavpWj4ghtgrv0yIkaQjML7C1bzjz0lymW4BeCn3wwyZUW/N9WBks= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1756823941; c=relaxed/simple; bh=ZYIXrBHD4yIy6w4Vca2iFtAhmSRGyH8KSR03FUXVhpM=; h=Date:From:To:Cc:Subject:Message-ID:References:MIME-Version: Content-Type:Content-Disposition:In-Reply-To; b=GTgMh5MPKJern+0aIRdYSMUqbgY4J63COAKYW+vovjgwd4fSsZId8P1vfXUj6J53UFAkoRGBIk+RY7K0bUjZ758k5BdOjVsKxmKPOtMs1YjO1ASnmgs8CKjy7p+Gz5JiNLGZiK32MFfY+ZBeoDwjzDycdtHsHKd1vS3xd56Zm0o= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com; spf=pass smtp.mailfrom=intel.com; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b=AKVXNIDw; arc=none smtp.client-ip=198.175.65.9 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=intel.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b="AKVXNIDw" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1756823940; x=1788359940; h=date:from:to:cc:subject:message-id:references: mime-version:content-transfer-encoding:in-reply-to; bh=ZYIXrBHD4yIy6w4Vca2iFtAhmSRGyH8KSR03FUXVhpM=; b=AKVXNIDwKCqJviLCHzs8HtMKcwW9oTk35gr5iDTt4z/byyaPwGd1ZgFb yNFG61gRo7gEZmMAGtZjhlKFmJZSvm6ePmh6cRyOnkPeUNqYEWI1sUUPW 45p1wSl26bXy6LDNP+CZwJj/bl+VQL/gQuZRIuhjALryZPlN4ECD++Vge Ss4HyQfA5eavDEORWK6OMB/lTYm3RcWQ7FxG1YNyCXBvlqCM60WHlELgM 4A1A/Scp7yUd4mF5lF+O6NP48arRrS0ZWwghh63tiwA3K8K7nFY0KsYad f05OYJv+SvCdt614cb6FuiRg/NUCFvBP4bLZlYTIfpXwp8m5ZkYUVCly8 Q==; X-CSE-ConnectionGUID: 8xENXCTPSVWN+PK99qzbGw== X-CSE-MsgGUID: wtuMxo/3SeaTckJOdjLEgA== X-IronPort-AV: E=McAfee;i="6800,10657,11531"; a="81685656" X-IronPort-AV: E=Sophos;i="6.17,312,1747724400"; d="scan'208";a="81685656" Received: from orviesa004.jf.intel.com ([10.64.159.144]) by orvoesa101.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 02 Sep 2025 07:38:57 -0700 X-CSE-ConnectionGUID: kELmzdc/Ro+s1d7reAqBKA== X-CSE-MsgGUID: V+D0bl4QSJiRO98p+FkBCw== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.18,230,1751266800"; d="scan'208";a="175657994" Received: from smile.fi.intel.com ([10.237.72.52]) by orviesa004.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 02 Sep 2025 07:38:47 -0700 Received: from andy by smile.fi.intel.com with local (Exim 4.98.2) (envelope-from ) id 1utS9j-0000000AiZa-008W; Tue, 02 Sep 2025 17:38:43 +0300 Date: Tue, 2 Sep 2025 17:38:42 +0300 From: Andy Shevchenko To: Bartosz Golaszewski Cc: Linus Walleij , Bjorn Andersson , Konrad Dybcio , Alexey Klimov , Lorenzo Bianconi , Sean Wang , Matthias Brugger , AngeloGioacchino Del Regno , Paul Cercueil , Kees Cook , Andy Shevchenko , Andrew Morton , David Hildenbrand , Lorenzo Stoakes , "Liam R. Howlett" , Vlastimil Babka , Mike Rapoport , Suren Baghdasaryan , Michal Hocko , Dong Aisheng , Fabio Estevam , Shawn Guo , Jacky Bai , Pengutronix Kernel Team , NXP S32 Linux Team , Sascha Hauer , Tony Lindgren , Haojian Zhuang , Geert Uytterhoeven , Greg Kroah-Hartman , "Rafael J. Wysocki" , Danilo Krummrich , Neil Armstrong , Mark Brown , linux-gpio@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org, linux-mediatek@lists.infradead.org, linux-arm-kernel@lists.infradead.org, linux-mips@vger.kernel.org, linux-hardening@vger.kernel.org, linux-mm@kvack.org, imx@lists.linux.dev, linux-omap@vger.kernel.org, linux-renesas-soc@vger.kernel.org, Bartosz Golaszewski , Konrad Dybcio Subject: Re: [PATCH v7 16/16] pinctrl: qcom: make the pinmuxing strict Message-ID: References: <20250902-pinctrl-gpio-pinfuncs-v7-0-bb091daedc52@linaro.org> <20250902-pinctrl-gpio-pinfuncs-v7-16-bb091daedc52@linaro.org> Precedence: bulk X-Mailing-List: imx@lists.linux.dev List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=iso-8859-1 Content-Disposition: inline Content-Transfer-Encoding: 8bit In-Reply-To: <20250902-pinctrl-gpio-pinfuncs-v7-16-bb091daedc52@linaro.org> Organization: Intel Finland Oy - BIC 0357606-4 - c/o Alberga Business Park, 6 krs, Bertel Jungin Aukio 5, 02600 Espoo On Tue, Sep 02, 2025 at 01:59:25PM +0200, Bartosz Golaszewski wrote: > From: Bartosz Golaszewski > > The strict flag in struct pinmux_ops disallows the usage of the same pin > as a GPIO and for another function. Without it, a rouge user-space > process with enough privileges (or even a buggy driver) can request a > used pin as GPIO and drive it, potentially confusing devices or even > crashing the system. Set it globally for all pinctrl-msm users. How does this keep (or allow) I²C generic recovery mechanism to work? -- With Best Regards, Andy Shevchenko