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From: Wolfram Sang <wsa+renesas@sang-engineering.com>
To: Herve Codina <herve.codina@bootlin.com>
Cc: Thomas Gleixner <tglx@linutronix.de>,
	Hoan Tran <hoan@os.amperecomputing.com>,
	Linus Walleij <linus.walleij@linaro.org>,
	Bartosz Golaszewski <brgl@bgdev.pl>,
	Rob Herring <robh@kernel.org>,
	Krzysztof Kozlowski <krzk+dt@kernel.org>,
	Conor Dooley <conor+dt@kernel.org>,
	Geert Uytterhoeven <geert+renesas@glider.be>,
	Magnus Damm <magnus.damm@gmail.com>,
	Saravana Kannan <saravanak@google.com>,
	Serge Semin <fancer.lancer@gmail.com>,
	Phil Edworthy <phil.edworthy@renesas.com>,
	linux-gpio@vger.kernel.org, devicetree@vger.kernel.org,
	linux-kernel@vger.kernel.org, linux-renesas-soc@vger.kernel.org,
	Pascal Eberhard <pascal.eberhard@se.com>,
	Miquel Raynal <miquel.raynal@bootlin.com>,
	Thomas Petazzoni <thomas.petazzoni@bootlin.com>
Subject: Re: [PATCH v3 7/8] soc: renesas: Add support for Renesas RZ/N1 GPIO Interrupt Multiplexer
Date: Fri, 19 Sep 2025 16:40:06 +0200	[thread overview]
Message-ID: <aM1rRuiJH9dlwBjL@shikoro> (raw)
In-Reply-To: <20250919151448.14f8719a@bootlin.com>

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> Rob asked to use only interrupt-map and use directly the interrupt-map index as
> the hardware index:
>   https://lore.kernel.org/lkml/20250801111753.382f52ac@bootlin.com/

I agree with that. Currently an interrupt-map entry looks like:

	interrupt-map = <0 &gic GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH>,

And the number after GIC_SPI determines the index register, no? Can't we
simply say 'index = <SPI_nr_from_dt> - 103' incl. some sanity checks?


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  reply	other threads:[~2025-09-19 14:40 UTC|newest]

Thread overview: 42+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-09-18 10:39 [PATCH v3 0/8] gpio: renesas: Add support for GPIO and related interrupts in RZ/N1 SoC Herve Codina (Schneider Electric)
2025-09-18 10:39 ` [PATCH v3 1/8] of/irq: Introduce for_each_of_imap_item Herve Codina (Schneider Electric)
2025-09-18 10:40 ` [PATCH v3 2/8] of: unittest: Add a test case for for_each_of_imap_item iterator Herve Codina (Schneider Electric)
2025-09-18 10:40 ` [PATCH v3 3/8] irqchip/ls-extirq: Use " Herve Codina (Schneider Electric)
2025-09-18 10:40 ` [PATCH v3 4/8] irqchip/renesas-rza1: " Herve Codina (Schneider Electric)
2025-09-18 10:40 ` [PATCH v3 5/8] ARM: dts: r9a06g032: Add GPIO controllers Herve Codina (Schneider Electric)
2025-09-19 10:03   ` Wolfram Sang
2025-09-22 14:22   ` Bartosz Golaszewski
2025-09-22 15:31     ` Herve Codina
2025-09-22 15:33       ` Bartosz Golaszewski
2025-09-22 16:08         ` Herve Codina
2025-09-18 10:40 ` [PATCH v3 6/8] dt-bindings: soc: renesas: Add the Renesas RZ/N1 GPIO Interrupt Multiplexer Herve Codina (Schneider Electric)
2025-09-18 15:06   ` Conor Dooley
2025-09-18 15:15     ` Herve Codina
2025-09-18 15:26       ` Conor Dooley
2025-09-18 15:39         ` Herve Codina
2025-09-18 15:44           ` Conor Dooley
2025-09-19 17:33             ` Rob Herring
2025-09-19  9:34   ` Wolfram Sang
2025-09-19 12:39     ` Herve Codina
2025-09-18 10:40 ` [PATCH v3 7/8] soc: renesas: Add support for " Herve Codina (Schneider Electric)
2025-09-19  9:41   ` Wolfram Sang
2025-09-19 13:14     ` Herve Codina
2025-09-19 14:40       ` Wolfram Sang [this message]
2025-09-19 15:30         ` Herve Codina
2025-09-19 15:47           ` Wolfram Sang
2025-10-14 13:19   ` Geert Uytterhoeven
2025-10-14 14:11     ` Wolfram Sang
2025-10-14 14:58       ` Geert Uytterhoeven
2025-09-18 10:40 ` [PATCH v3 8/8] ARM: dts: r9a06g032: Add support for GPIO interrupts Herve Codina (Schneider Electric)
2025-09-19  9:42   ` Wolfram Sang
2025-09-19 13:59     ` Herve Codina
2025-09-19 14:41       ` Wolfram Sang
2025-09-19 17:12         ` Herve Codina
2025-09-22 14:16           ` Herve Codina
2025-09-22 14:29             ` Wolfram Sang
2025-09-18 15:37 ` [PATCH v3 0/8] gpio: renesas: Add support for GPIO and related interrupts in RZ/N1 SoC Conor Dooley
2025-09-18 15:57   ` Herve Codina
2025-09-19  5:41 ` Wolfram Sang
2025-09-19  9:43   ` Wolfram Sang
2025-09-19  9:54     ` Wolfram Sang
2025-09-19 15:48       ` Wolfram Sang

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