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From: "Ville Syrjälä" <ville.syrjala@linux.intel.com>
To: "Hogander, Jouni" <jouni.hogander@intel.com>
Cc: "intel-gfx@lists.freedesktop.org" <intel-gfx@lists.freedesktop.org>
Subject: Re: [PATCH v2 6/6] drm/i915/pm: Drop redundant pci stuff from suspend/resume paths
Date: Fri, 12 Sep 2025 15:56:16 +0300	[thread overview]
Message-ID: <aMQYcPE73nEgx1ZN@intel.com> (raw)
In-Reply-To: <8507920a2e7ffc94fb6ad71fb2b7c35191ae176d.camel@intel.com>

On Fri, Sep 12, 2025 at 09:44:15AM +0000, Hogander, Jouni wrote:
> On Tue, 2025-03-11 at 21:56 +0200, Ville Syrjala wrote:
> > From: Ville Syrjälä <ville.syrjala@linux.intel.com>
> > 
> > I don't think there should be any need for us to call any of
> > pci_enable_device(), pci_disable_device() or pci_set_master()
> > from the suspend/resume paths. The config space save/restore should
> > take care of all of this.
> 
> I couldn't find out what save/restore you are referring here. At least
> driver/pci isn't doing these in it's suspend/resume paths. Can you
> please point me out?

The save/restore of config space. IIRC the io, mem, and
busmaster enable bits all live in the pci command register.

> 
> BR,
> 
> Jouni Högander
> > 
> > Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> > ---
> >  drivers/gpu/drm/i915/i915_driver.c | 31 ----------------------------
> > --
> >  1 file changed, 31 deletions(-)
> > 
> > diff --git a/drivers/gpu/drm/i915/i915_driver.c
> > b/drivers/gpu/drm/i915/i915_driver.c
> > index 503f1b6b694f..d3d1b2d082dd 100644
> > --- a/drivers/gpu/drm/i915/i915_driver.c
> > +++ b/drivers/gpu/drm/i915/i915_driver.c
> > @@ -1092,7 +1092,6 @@ static int i915_drm_suspend_late(struct
> > drm_device *dev, bool hibernation)
> >  {
> >  	struct drm_i915_private *dev_priv = to_i915(dev);
> >  	struct intel_display *display = &dev_priv->display;
> > -	struct pci_dev *pdev = to_pci_dev(dev_priv->drm.dev);
> >  	struct intel_runtime_pm *rpm = &dev_priv->runtime_pm;
> >  	struct intel_gt *gt;
> >  	int ret, i;
> > @@ -1113,21 +1112,10 @@ static int i915_drm_suspend_late(struct
> > drm_device *dev, bool hibernation)
> >  	if (ret) {
> >  		drm_err(&dev_priv->drm, "Suspend complete failed:
> > %d\n", ret);
> >  		intel_display_power_resume_early(display);
> > -
> > -		goto fail;
> >  	}
> >  
> >  	enable_rpm_wakeref_asserts(rpm);
> >  
> > -	if (!dev_priv->uncore.user_forcewake_count)
> > -		intel_runtime_pm_driver_release(rpm);
> > -
> > -	pci_disable_device(pdev);
> > -
> > -	return 0;
> > -
> > -fail:
> > -	enable_rpm_wakeref_asserts(rpm);
> >  	if (!dev_priv->uncore.user_forcewake_count)
> >  		intel_runtime_pm_driver_release(rpm);
> >  
> > @@ -1278,7 +1266,6 @@ static int i915_drm_resume_early(struct
> > drm_device *dev)
> >  {
> >  	struct drm_i915_private *dev_priv = to_i915(dev);
> >  	struct intel_display *display = &dev_priv->display;
> > -	struct pci_dev *pdev = to_pci_dev(dev_priv->drm.dev);
> >  	struct intel_gt *gt;
> >  	int ret, i;
> >  
> > @@ -1292,24 +1279,6 @@ static int i915_drm_resume_early(struct
> > drm_device *dev)
> >  	 * similar so that power domains can be employed.
> >  	 */
> >  
> > -	/*
> > -	 * Note that pci_enable_device() first enables any parent
> > bridge
> > -	 * device and only then sets the power state for this
> > device. The
> > -	 * bridge enabling is a nop though, since bridge devices are
> > resumed
> > -	 * first. The order of enabling power and enabling the
> > device is
> > -	 * imposed by the PCI core as described above, so here we
> > preserve the
> > -	 * same order for the freeze/thaw phases.
> > -	 *
> > -	 * TODO: eventually we should remove pci_disable_device() /
> > -	 * pci_enable_enable_device() from suspend/resume. Due to
> > how they
> > -	 * depend on the device enable refcount we can't anyway
> > depend on them
> > -	 * disabling/enabling the device.
> > -	 */
> > -	if (pci_enable_device(pdev))
> > -		return -EIO;
> > -
> > -	pci_set_master(pdev);
> > -
> >  	disable_rpm_wakeref_asserts(&dev_priv->runtime_pm);
> >  
> >  	ret = vlv_resume_prepare(dev_priv, false);
> 

-- 
Ville Syrjälä
Intel

  reply	other threads:[~2025-09-12 12:56 UTC|newest]

Thread overview: 29+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-03-11 19:56 [PATCH v2 0/6] drm/i915/pm: Clean up the hibernate vs. PCI D3 quirk Ville Syrjala
2025-03-11 19:56 ` [PATCH v2 1/6] drm/i915/pm: Simplify pm hook documentation Ville Syrjala
2025-09-12 13:51   ` Hogander, Jouni
2025-03-11 19:56 ` [PATCH v2 2/6] drm/i915/pm: Hoist pci_save_state()+pci_set_power_state() to the end of pm _late() hook Ville Syrjala
2025-03-15  0:51   ` Rodrigo Vivi
2025-03-17  7:17   ` Raag Jadav
2025-09-12 13:52   ` Hogander, Jouni
2025-03-11 19:56 ` [PATCH v2 3/6] drm/i915/pm: Move the hibernate+D3 quirk stuff into noirq() pm hooks Ville Syrjala
2025-09-12 13:52   ` Hogander, Jouni
2025-03-11 19:56 ` [PATCH v2 4/6] drm/i915/pm: Do pci_restore_state() in switcheroo resume hook Ville Syrjala
2025-03-15  0:55   ` Rodrigo Vivi
2025-09-12 13:53   ` Hogander, Jouni
2025-03-11 19:56 ` [PATCH v2 5/6] drm/i915/pm: Allow drivers/pci to manage our pci state normally Ville Syrjala
2025-03-15  0:56   ` Rodrigo Vivi
2025-09-12 13:53   ` Hogander, Jouni
2025-03-11 19:56 ` [PATCH v2 6/6] drm/i915/pm: Drop redundant pci stuff from suspend/resume paths Ville Syrjala
2025-03-15  1:00   ` Rodrigo Vivi
2025-09-12  9:44   ` Hogander, Jouni
2025-09-12 12:56     ` Ville Syrjälä [this message]
2025-09-12 13:54   ` Hogander, Jouni
2025-03-11 23:15 ` ✗ i915.CI.BAT: failure for drm/i915/pm: Clean up the hibernate vs. PCI D3 quirk (rev2) Patchwork
2025-03-12  9:52   ` Ville Syrjälä
2025-03-12 10:05     ` Saarinen, Jani
2025-03-12 10:07       ` Saarinen, Jani
2025-03-12 11:53         ` Saarinen, Jani
2025-03-12 12:06       ` Knop, Ryszard
2025-04-25 18:08 ` ✗ Fi.CI.BUILD: warning for drm/i915/pm: Clean up the hibernate vs. PCI D3 quirk (rev3) Patchwork
2025-04-25 19:40 ` ✓ i915.CI.BAT: success " Patchwork
2025-04-26  3:56 ` ✓ i915.CI.Full: " Patchwork

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