Hi Marek,

thanks for your hard work on the PCIe issue.

>  	/* Reset module */
>  	writel(bitmask, priv->pub.base0 + priv->reset_regs[reg]);
> +	readl(priv->pub.base0 + priv->reset_regs[reg]);

Maybe it makes sense to introduce a light helper function
'writel_with_latch' or something?

a) we can have a central documentation point to describe why this is
needed and for which registers

b) this makes it hopefully more likely that future additions will use
the helper right away and not forget to latch their access

Opinions?

Happy hacking,

   Wolfram