From: "Ville Syrjälä" <ville.syrjala@linux.intel.com>
To: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
Cc: intel-gfx@lists.freedesktop.org, intel-xe@lists.freedesktop.org,
jouni.hogander@intel.com, animesh.manna@intel.com
Subject: Re: [PATCH 09/10] drm/i915/display: Add vblank_start adjustment logic for always-on VRR TG
Date: Wed, 15 Oct 2025 16:54:28 +0300 [thread overview]
Message-ID: <aO-nlDe9i-Xe51Vx@intel.com> (raw)
In-Reply-To: <20251015072217.1710717-10-ankit.k.nautiyal@intel.com>
On Wed, Oct 15, 2025 at 12:52:16PM +0530, Ankit Nautiyal wrote:
> As we move towards using a shorter, optimized guardband, we need to adjust
> how the delayed vblank start is computed.
>
> Adjust the crtc_vblank_start using Vmin Vtotal - guardband only when
> intel_vrr_always_use_vrr_tg() is true. Also update the
> pipe_mode->crtc_vblank_start which is derived from
> adjusted_mode->crtc_vblank_start in intel_crtc_compute_pipe_mode().
>
> To maintain consistency between the computed and readout paths, also update
> the readout logic in intel_vrr_get_config() to overwrite crtc_vblank_start
> with the same value (vtotal - guardband) on platforms with always-on
> VRR TG. pipe_mode is derived
>
> This also paves way for guardband optimization, by handling the movement of
> the crtc_vblank_start for platforms that have VRR TG always active.
>
> v2: Drop the helper and add the adjustment directly to
> intel_vrr_compute_guardband(). (Ville)
> v3: Use adjusted_mode.crtc_vtotal instead of vmin and include the readout
> logic to keep the compute and readout paths in sync. (Ville)
> v4: Also set pipe_mode->crtc_vblank_start as its derived from
> adjusted_mode. (Ville)
>
> Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
> ---
> drivers/gpu/drm/i915/display/intel_vrr.c | 23 ++++++++++++++++++++++-
> 1 file changed, 22 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_vrr.c b/drivers/gpu/drm/i915/display/intel_vrr.c
> index 8d71d7dc9d12..1cfcc31bd899 100644
> --- a/drivers/gpu/drm/i915/display/intel_vrr.c
> +++ b/drivers/gpu/drm/i915/display/intel_vrr.c
> @@ -436,7 +436,8 @@ intel_vrr_max_guardband(struct intel_crtc_state *crtc_state)
> void intel_vrr_compute_guardband(struct intel_crtc_state *crtc_state)
> {
> struct intel_display *display = to_intel_display(crtc_state);
> - const struct drm_display_mode *adjusted_mode = &crtc_state->hw.adjusted_mode;
> + struct drm_display_mode *adjusted_mode = &crtc_state->hw.adjusted_mode;
> + struct drm_display_mode *pipe_mode = &crtc_state->hw.pipe_mode;
>
> if (!intel_vrr_possible(crtc_state))
> return;
> @@ -444,6 +445,13 @@ void intel_vrr_compute_guardband(struct intel_crtc_state *crtc_state)
> crtc_state->vrr.guardband = min(crtc_state->vrr.vmin - adjusted_mode->crtc_vdisplay,
> intel_vrr_max_guardband(crtc_state));
>
> + if (intel_vrr_always_use_vrr_tg(display)) {
> + adjusted_mode->crtc_vblank_start =
> + adjusted_mode->crtc_vtotal - crtc_state->vrr.guardband;
Maybe a small comment here to explain why we touch pipe_mode.
Eg.
/*
* pipe_mode has already been derived from the
* original adjusted_mode, keep the two in sync.
*/
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> + pipe_mode->crtc_vblank_start =
> + adjusted_mode->crtc_vblank_start;
> + }
> +
> if (DISPLAY_VER(display) < 13)
> crtc_state->vrr.pipeline_full =
> intel_vrr_guardband_to_pipeline_full(crtc_state,
> @@ -821,6 +829,19 @@ void intel_vrr_get_config(struct intel_crtc_state *crtc_state)
> */
> if (crtc_state->vrr.enable)
> crtc_state->mode_flags |= I915_MODE_FLAG_VRR;
> +
> + /*
> + * For platforms that always use the VRR timing generator, we overwrite
> + * crtc_vblank_start with vtotal - guardband to reflect the delayed
> + * vblank start. This works for both default and optimized guardband values.
> + * On other platforms, we keep the original value from
> + * intel_get_transcoder_timings() and apply adjustments only in VRR-specific
> + * paths as needed.
> + */
> + if (intel_vrr_always_use_vrr_tg(display))
> + crtc_state->hw.adjusted_mode.crtc_vblank_start =
> + crtc_state->hw.adjusted_mode.crtc_vtotal -
> + crtc_state->vrr.guardband;
> }
>
> int intel_vrr_safe_window_start(const struct intel_crtc_state *crtc_state)
> --
> 2.45.2
--
Ville Syrjälä
Intel
next prev parent reply other threads:[~2025-10-15 13:54 UTC|newest]
Thread overview: 31+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-10-15 7:22 [PATCH 00/10] Preparatory patches for guardband optimization Ankit Nautiyal
2025-10-15 7:22 ` [PATCH 01/10] drm/i915/vrr: Use crtc_vsync_start/end for computing vrr.vsync_start/end Ankit Nautiyal
2025-10-15 7:22 ` [PATCH 02/10] drm/i915/display: Move intel_dpll_crtc_compute_clock early Ankit Nautiyal
2025-10-15 7:22 ` [PATCH 03/10] drm/i915/vrr: s/intel_vrr_compute_config_late/intel_vrr_compute_guardband Ankit Nautiyal
2025-10-15 7:22 ` [PATCH 04/10] drm/i915/vblank: Add helper to get correct vblank length Ankit Nautiyal
2025-10-15 7:22 ` [PATCH 05/10] drm/i915/psr: Consider SCL lines when validating vblank for wake latency Ankit Nautiyal
2025-10-15 7:22 ` [PATCH 06/10] drm/i915/psr: Introduce helper intel_psr_set_non_psr_pipes() Ankit Nautiyal
2025-10-15 7:57 ` Hogander, Jouni
2025-10-15 7:22 ` [PATCH 07/10] drm/i915/display: Introduce dp/psr_compute_config_late() Ankit Nautiyal
2025-10-15 7:59 ` Hogander, Jouni
2025-10-15 7:22 ` [PATCH 08/10] drm/i915/psr: Check if final vblank is sufficient for PSR features Ankit Nautiyal
2025-10-15 8:23 ` Hogander, Jouni
2025-10-15 8:33 ` Hogander, Jouni
2025-10-15 9:14 ` Ankit Nautiyal
2025-10-15 9:32 ` Hogander, Jouni
2025-10-15 7:22 ` [PATCH 09/10] drm/i915/display: Add vblank_start adjustment logic for always-on VRR TG Ankit Nautiyal
2025-10-15 13:54 ` Ville Syrjälä [this message]
2025-10-15 7:22 ` [PATCH 10/10] drm/i915/display: Prepare for vblank_delay for LRR Ankit Nautiyal
2025-10-15 15:00 ` Ville Syrjälä
2025-10-15 8:18 ` ✓ CI.KUnit: success for Preparatory patches for guardband optimization (rev6) Patchwork
2025-10-15 8:33 ` ✗ CI.checksparse: warning " Patchwork
2025-10-15 9:42 ` ✓ Xe.CI.BAT: success " Patchwork
2025-10-15 11:07 ` ✓ i915.CI.BAT: success for Preparatory patches for guardband optimization (rev7) Patchwork
2025-10-15 13:59 ` ✓ CI.KUnit: " Patchwork
2025-10-15 14:14 ` ✗ CI.checksparse: warning " Patchwork
2025-10-15 14:36 ` ✓ Xe.CI.BAT: success " Patchwork
2025-10-15 17:12 ` ✗ i915.CI.Full: failure " Patchwork
2025-10-15 18:46 ` ✗ Xe.CI.Full: failure for Preparatory patches for guardband optimization (rev6) Patchwork
2025-10-15 23:29 ` ✗ Xe.CI.Full: failure for Preparatory patches for guardband optimization (rev7) Patchwork
2025-10-16 5:24 ` ✓ i915.CI.Full: success " Patchwork
-- strict thread matches above, loose matches on Subject: below --
2025-10-16 5:54 [PATCH 00/10] Preparatory patches for guardband optimization Ankit Nautiyal
2025-10-16 5:54 ` [PATCH 09/10] drm/i915/display: Add vblank_start adjustment logic for always-on VRR TG Ankit Nautiyal
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=aO-nlDe9i-Xe51Vx@intel.com \
--to=ville.syrjala@linux.intel.com \
--cc=animesh.manna@intel.com \
--cc=ankit.k.nautiyal@intel.com \
--cc=intel-gfx@lists.freedesktop.org \
--cc=intel-xe@lists.freedesktop.org \
--cc=jouni.hogander@intel.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.