From: Lukas Wunner <lukas@wunner.de>
To: Bjorn Helgaas <helgaas@kernel.org>
Cc: linux-pci@vger.kernel.org,
Christian Zigotzky <chzigotzky@xenosoft.de>,
Manivannan Sadhasivam <mani@kernel.org>,
mad skateman <madskateman@gmail.com>,
"R . T . Dickinson" <rtd2@xtra.co.nz>,
Darren Stevens <darren@stevens-zone.net>,
John Paul Adrian Glaubitz <glaubitz@physik.fu-berlin.de>,
luigi burdo <intermediadc@hotmail.com>, Al <al@datazap.net>,
Roland <rol7and@gmx.com>, Hongxing Zhu <hongxing.zhu@nxp.com>,
hypexed@yahoo.com.au, linuxppc-dev@lists.ozlabs.org,
debian-powerpc@lists.debian.org, linux-kernel@vger.kernel.org,
Bjorn Helgaas <bhelgaas@google.com>
Subject: Re: [PATCH 2/2] PCI/ASPM: Avoid L0s and L1 on Freescale Root Ports
Date: Fri, 7 Nov 2025 06:35:49 +0100 [thread overview]
Message-ID: <aQ2FNfdDPUdA27rS@wunner.de> (raw)
In-Reply-To: <20251106183643.1963801-3-helgaas@kernel.org>
On Thu, Nov 06, 2025 at 12:36:39PM -0600, Bjorn Helgaas wrote:
> +++ b/drivers/pci/quirks.c
> @@ -2525,6 +2525,18 @@ static void quirk_disable_aspm_l0s_l1(struct pci_dev *dev)
> */
> DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_ASMEDIA, 0x1080, quirk_disable_aspm_l0s_l1);
>
> +/*
> + * Remove ASPM L0s and L1 support from cached copy of Link Capabilities so
> + * aspm.c won't try to enable them.
> + */
> +static void quirk_disable_aspm_l0s_l1_cap(struct pci_dev *dev)
> +{
> + dev->lnkcap &= ~PCI_EXP_LNKCAP_ASPM_L0S;
> + dev->lnkcap &= ~PCI_EXP_LNKCAP_ASPM_L1;
> + pci_info(dev, "ASPM: L0s L1 removed from Link Capabilities to work around device defect\n");
> +}
> +DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_FREESCALE, 0x0451, quirk_disable_aspm_l0s_l1_cap);
> +
Hm, I liked the nice generic pcie_aspm_disable_cap() helper that
you had in this earlier version:
https://lore.kernel.org/all/20251105220925.GA1926619@bhelgaas/
Thanks,
Lukas
next prev parent reply other threads:[~2025-11-07 5:43 UTC|newest]
Thread overview: 15+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-11-06 18:36 [PATCH 0/2] PCI/ASPM: Allow quirks to avoid L0s and L1 Bjorn Helgaas
2025-11-06 18:36 ` [PATCH 1/2] PCI/ASPM: Cache Link Capabilities so quirks can override them Bjorn Helgaas
2025-11-07 1:17 ` Shawn Lin
2025-11-07 6:03 ` Manivannan Sadhasivam
2025-11-07 6:16 ` Shawn Lin
2025-11-07 5:32 ` Lukas Wunner
2025-11-07 15:25 ` Bjorn Helgaas
2025-11-06 18:36 ` [PATCH 2/2] PCI/ASPM: Avoid L0s and L1 on Freescale Root Ports Bjorn Helgaas
2025-11-07 5:35 ` Lukas Wunner [this message]
2025-11-07 6:09 ` Manivannan Sadhasivam
2025-11-07 21:55 ` Bjorn Helgaas
2025-11-06 23:45 ` [PATCH 0/2] PCI/ASPM: Allow quirks to avoid L0s and L1 Bjorn Helgaas
2025-11-07 2:33 ` Hongxing Zhu
2025-11-07 5:40 ` Manivannan Sadhasivam
2025-11-07 6:33 ` Lukas Wunner
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=aQ2FNfdDPUdA27rS@wunner.de \
--to=lukas@wunner.de \
--cc=al@datazap.net \
--cc=bhelgaas@google.com \
--cc=chzigotzky@xenosoft.de \
--cc=darren@stevens-zone.net \
--cc=debian-powerpc@lists.debian.org \
--cc=glaubitz@physik.fu-berlin.de \
--cc=helgaas@kernel.org \
--cc=hongxing.zhu@nxp.com \
--cc=hypexed@yahoo.com.au \
--cc=intermediadc@hotmail.com \
--cc=linux-kernel@vger.kernel.org \
--cc=linux-pci@vger.kernel.org \
--cc=linuxppc-dev@lists.ozlabs.org \
--cc=madskateman@gmail.com \
--cc=mani@kernel.org \
--cc=rol7and@gmx.com \
--cc=rtd2@xtra.co.nz \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.