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From: Sean Christopherson <seanjc@google.com>
To: Pawan Gupta <pawan.kumar.gupta@linux.intel.com>
Cc: Paolo Bonzini <pbonzini@redhat.com>,
	Thomas Gleixner <tglx@linutronix.de>,
	 Borislav Petkov <bp@alien8.de>,
	Peter Zijlstra <peterz@infradead.org>,
	 Josh Poimboeuf <jpoimboe@kernel.org>,
	kvm@vger.kernel.org, linux-kernel@vger.kernel.org,
	 Brendan Jackman <jackmanb@google.com>
Subject: Re: [PATCH v4 2/8] x86/bugs: Decouple ALTERNATIVE usage from VERW macro definition
Date: Mon, 3 Nov 2025 09:00:48 -0800	[thread overview]
Message-ID: <aQjfwARMXlb1GGLJ@google.com> (raw)
In-Reply-To: <20251101041324.k2crtjvwqaxhkasr@desk>

On Fri, Oct 31, 2025, Pawan Gupta wrote:
> On Thu, Oct 30, 2025 at 05:30:34PM -0700, Sean Christopherson wrote:
> > Decouple the use of ALTERNATIVE from the encoding of VERW to clear CPU
> > buffers so that KVM can use ALTERNATIVE_2 to handle "always clear buffers"
> > and "clear if guest can access host MMIO" in a single statement.
> > 
> > No functional change intended.
> > 
> > Signed-off-by: Sean Christopherson <seanjc@google.com>
> > ---
> >  arch/x86/include/asm/nospec-branch.h | 21 ++++++++++-----------
> >  1 file changed, 10 insertions(+), 11 deletions(-)
> > 
> > diff --git a/arch/x86/include/asm/nospec-branch.h b/arch/x86/include/asm/nospec-branch.h
> > index 08ed5a2e46a5..923ae21cbef1 100644
> > --- a/arch/x86/include/asm/nospec-branch.h
> > +++ b/arch/x86/include/asm/nospec-branch.h
> > @@ -308,24 +308,23 @@
> >   * CFLAGS.ZF.
> >   * Note: Only the memory operand variant of VERW clears the CPU buffers.
> >   */
> > -.macro __CLEAR_CPU_BUFFERS feature
> >  #ifdef CONFIG_X86_64
> > -	ALTERNATIVE "", "verw x86_verw_sel(%rip)", \feature
> > +#define CLEAR_CPU_BUFFERS_SEQ	verw x86_verw_sel(%rip)
> >  #else
> > -	/*
> > -	 * In 32bit mode, the memory operand must be a %cs reference. The data
> > -	 * segments may not be usable (vm86 mode), and the stack segment may not
> > -	 * be flat (ESPFIX32).
> > -	 */
> > -	ALTERNATIVE "", "verw %cs:x86_verw_sel", \feature
> > +/*
> > + * In 32bit mode, the memory operand must be a %cs reference. The data segments
> > + * may not be usable (vm86 mode), and the stack segment may not be flat (ESPFIX32).
> > + */
> > +#define CLEAR_CPU_BUFFERS_SEQ	verw %cs:x86_verw_sel
> >  #endif
> > -.endm
> > +
> > +#define __CLEAR_CPU_BUFFERS	__stringify(CLEAR_CPU_BUFFERS_SEQ)
> >  
> >  #define CLEAR_CPU_BUFFERS \
> > -	__CLEAR_CPU_BUFFERS X86_FEATURE_CLEAR_CPU_BUF
> > +	ALTERNATIVE "", __CLEAR_CPU_BUFFERS, X86_FEATURE_CLEAR_CPU_BUF
> >  
> >  #define VM_CLEAR_CPU_BUFFERS \
> > -	__CLEAR_CPU_BUFFERS X86_FEATURE_CLEAR_CPU_BUF_VM
> > +	ALTERNATIVE "", __CLEAR_CPU_BUFFERS, X86_FEATURE_CLEAR_CPU_BUF_VM
> 
> Sorry nitpicking, we have too many "CLEAR_CPU_BUF" in these macros, can we
> avoid adding CLEAR_CPU_BUFFERS_SEQ?

AFAICT, there's no sane way to avoid defining a macro for the raw instruction. :-/

> Or better yet, can we name the actual instruction define to VERW_SEQ, 

Works for me.

  reply	other threads:[~2025-11-03 17:00 UTC|newest]

Thread overview: 57+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-10-31  0:30 [PATCH v4 0/8] x86/bugs: KVM: L1TF and MMIO Stale Data cleanups Sean Christopherson
2025-10-31  0:30 ` [PATCH v4 1/8] x86/bugs: Use VM_CLEAR_CPU_BUFFERS in VMX as well Sean Christopherson
2025-10-31 11:30   ` Brendan Jackman
2025-11-01  1:46     ` Pawan Gupta
2025-11-03 18:18   ` Pawan Gupta
2025-11-07 19:05     ` Borislav Petkov
2025-11-11 22:03       ` Sean Christopherson
2025-11-12 10:23         ` Borislav Petkov
2025-11-12 18:19           ` Pawan Gupta
2025-11-12 18:17       ` Pawan Gupta
2025-11-07 18:59   ` Borislav Petkov
2025-11-12 18:02     ` Pawan Gupta
2025-10-31  0:30 ` [PATCH v4 2/8] x86/bugs: Decouple ALTERNATIVE usage from VERW macro definition Sean Christopherson
2025-10-31 11:37   ` Brendan Jackman
2025-10-31 17:43     ` Sean Christopherson
2025-11-01  4:13   ` Pawan Gupta
2025-11-03 17:00     ` Sean Christopherson [this message]
2025-11-03 17:40       ` Pawan Gupta
2025-11-12 12:15       ` Borislav Petkov
2025-10-31  0:30 ` [PATCH v4 3/8] x86/bugs: Use an X86_FEATURE_xxx flag for the MMIO Stale Data mitigation Sean Christopherson
2025-10-31 11:44   ` Brendan Jackman
2025-10-31 21:47     ` Sean Christopherson
2025-11-03 10:49       ` Brendan Jackman
2025-10-31 22:28   ` Pawan Gupta
2025-10-31 22:37     ` Sean Christopherson
2025-10-31 22:50       ` Pawan Gupta
2025-11-12 14:46   ` Borislav Petkov
2025-11-12 18:24     ` Pawan Gupta
2025-10-31  0:30 ` [PATCH v4 4/8] KVM: VMX: Handle MMIO Stale Data in VM-Enter assembly via ALTERNATIVES_2 Sean Christopherson
2025-10-31 12:32   ` Brendan Jackman
2025-10-31 21:44     ` Sean Christopherson
2025-11-03 10:51       ` Brendan Jackman
2025-10-31 23:55   ` Pawan Gupta
2025-11-01  3:41     ` Pawan Gupta
2025-11-03  9:17     ` Peter Zijlstra
2025-11-03 17:37       ` Pawan Gupta
2025-11-03 17:46   ` Pawan Gupta
2025-11-12 16:41   ` Borislav Petkov
2025-11-12 17:15     ` Sean Christopherson
2025-11-12 18:38       ` Borislav Petkov
2025-11-12 20:30         ` Sean Christopherson
2025-11-12 23:01           ` Pawan Gupta
2025-11-13 14:20           ` Borislav Petkov
2025-11-13 22:01             ` Sean Christopherson
2025-10-31  0:30 ` [PATCH v4 5/8] x86/bugs: KVM: Move VM_CLEAR_CPU_BUFFERS into SVM as SVM_CLEAR_CPU_BUFFERS Sean Christopherson
2025-10-31 12:34   ` Brendan Jackman
2025-11-13 15:03   ` Borislav Petkov
2025-11-13 15:37     ` Sean Christopherson
2025-11-13 16:19       ` Borislav Petkov
2025-10-31  0:30 ` [PATCH v4 6/8] KVM: VMX: Bundle all L1 data cache flush mitigation code together Sean Christopherson
2025-11-03 18:26   ` Pawan Gupta
2025-10-31  0:30 ` [PATCH v4 7/8] KVM: VMX: Disable L1TF L1 data cache flush if CONFIG_CPU_MITIGATIONS=n Sean Christopherson
2025-10-31 12:37   ` Brendan Jackman
2025-10-31  0:30 ` [PATCH v4 8/8] KVM: x86: Unify L1TF flushing under per-CPU variable Sean Christopherson
2025-10-31 11:22 ` [PATCH v4 0/8] x86/bugs: KVM: L1TF and MMIO Stale Data cleanups Brendan Jackman
2025-10-31 17:36   ` Sean Christopherson
2025-11-04 10:58     ` Brendan Jackman

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