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CTRY:US; LANG:en; SCL:1; SRV:; IPV:NLI; SFV:NSPM; H:mail.nvidia.com; PTR:dc7edge1.nvidia.com; CAT:NONE; SFS:(13230040)(7416014)(376014)(36860700013)(1800799024)(82310400026); DIR:OUT; SFP:1101; X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 05 Nov 2025 18:33:23.2858 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: fbc68c06-4144-4de3-b3d7-08de1c99cd63 X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a; Ip=[216.228.118.232]; Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: BN2PEPF000044AB.namprd04.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: CY8PR12MB7562 Received-SPF: permerror client-ip=2a01:111:f403:c005::5; envelope-from=nicolinc@nvidia.com; helo=CO1PR03CU002.outbound.protection.outlook.com X-Spam_score_int: -15 X-Spam_score: -1.6 X-Spam_bar: - X-Spam_report: (-1.6 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.517, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FORGED_SPF_HELO=1, SPF_HELO_PASS=-0.001, SPF_NONE=0.001 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-arm@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-arm-bounces+qemu-arm=archiver.kernel.org@nongnu.org Sender: qemu-arm-bounces+qemu-arm=archiver.kernel.org@nongnu.org On Wed, Nov 05, 2025 at 02:10:49PM -0400, Jason Gunthorpe wrote: > On Wed, Nov 05, 2025 at 06:25:05PM +0100, Eric Auger wrote: > > if the guest doorbell address is wrong because not properly translated, > > vgic_msi_to_its() will fail to identify the ITS to inject the MSI in. > > See kernel kvm/vgic/vgic-its.c vgic_msi_to_its and > > vgic_its_inject_msi > > Which has been exactly my point to Nicolin. There is no way to > "properly translate" the vMSI address in a HW accelerated SMMU > emulation. Hmm, I still can't connect the dots here. QEMU knows where the guest CD table is to get the stage-1 translation table to walk through. We could choose to not let it walk through. Yet, why? Asking this to know what we should justify for the patch in a different direction. > The vMSI address must only be used for some future non-RMR HW only > path. > > To keep this flow working qemu must ignore the IOVA from the guest and > always replace it with its own idea of what the correct ITS address is > for KVM to work. It means we don't correctly emulate guest > misconfiguration of the MSI address. That is something alternative in my mind, to simplify things, especially we are having a discussion, on the other side, for selecting a correct (QEMU) address space depending on whether vIOMMU needs a stage-1 translation or not. This MSI translate thing makes the whole narrative more complicated indeed. We could use a different PCI op to forward the vITS physical address to KVM layer bypassing the translation pathway. Thanks Nicolin