Re: [PATCH 0/3] ADF41513/ADF41510 PLL frequency synthesizers

[Andy Shevchenko <andriy.shevchenko@intel.com>]

On Mon, Nov 10, 2025 at 03:44:43PM +0000, Rodrigo Alencar via B4 Relay wrote:
> This patch series adds support for the Analog Devices ADF41513 and ADF41510
> ultralow noise PLL frequency synthesizers. These devices are designed for
> implementing local oscillators (LOs) in high-frequency applications.
> 
> The ADF41513 covers frequencies from 1 GHz to 26.5 GHz, while the ADF41510
> operates from 1 GHz to 10 GHz. Both devices feature exceptional phase noise
> performance and flexible frequency synthesis capabilities.
> 
> Key features supported by this driver:
> - Integer-N and fractional-N operation modes
> - Ultra-low phase noise (-235 dBc/Hz integer-N, -231 dBc/Hz fractional-N)
> - High maximum PFD frequency (250 MHz integer-N, 125 MHz fractional-N)
> - 25-bit fixed modulus or 49-bit variable modulus fractional modes
> - Programmable charge pump currents with 16x range
> - Digital lock detect functionality
> - Phase resync capability for consistent output phase
> - Clock framework integration for system clock generation
> 
> The series includes:
> 1. Core driver implementation with full register programming support
> 2. Device tree bindings documentation
> 3. IIO subsystem documentation with usage examples
> 
> The driver integrates with both the IIO subsystem (for direct hardware control)
> and the Linux clock framework (for use as a system clock source), providing
> flexibility for different use cases.

When cover letter is better than the commit message :-)

-- 
With Best Regards,
Andy Shevchenko