From: "Ville Syrjälä" <ville.syrjala@linux.intel.com>
To: Matt Roper <matthew.d.roper@intel.com>
Cc: "Gustavo Sousa" <gustavo.sousa@intel.com>,
intel-xe@lists.freedesktop.org, intel-gfx@lists.freedesktop.org,
"Ankit Nautiyal" <ankit.k.nautiyal@intel.com>,
"Dnyaneshwar Bhadane" <dnyaneshwar.bhadane@intel.com>,
"Jouni Högander" <jouni.hogander@intel.com>,
"Juha-pekka Heikkila" <juha-pekka.heikkila@intel.com>,
"Luca Coelho" <luciano.coelho@intel.com>,
"Lucas De Marchi" <lucas.demarchi@intel.com>,
"Matt Atwood" <matthew.s.atwood@intel.com>,
"Ravi Kumar Vodapalli" <ravi.kumar.vodapalli@intel.com>,
"Shekhar Chauhan" <shekhar.chauhan@intel.com>,
"Vinod Govindapillai" <vinod.govindapillai@intel.com>
Subject: Re: [PATCH v4 05/11] drm/i915/fbc: Add intel_fbc_id_for_pipe()
Date: Mon, 10 Nov 2025 19:03:03 +0200 [thread overview]
Message-ID: <aRIax3ASIE6Zp6rJ@intel.com> (raw)
In-Reply-To: <20251110163503.GD4063759@mdroper-desk1.amr.corp.intel.com>
On Mon, Nov 10, 2025 at 08:35:03AM -0800, Matt Roper wrote:
> On Fri, Nov 07, 2025 at 09:05:38PM -0300, Gustavo Sousa wrote:
> > We will need to know the FBC id respective to the pipe in other parts of
> > the driver. Let's promote the static function skl_fbc_id_for_pipe() to a
> > public one named intel_fbc_id_for_pipe().
> >
> > Signed-off-by: Gustavo Sousa <gustavo.sousa@intel.com>
> > ---
> > drivers/gpu/drm/i915/display/intel_fbc.c | 5 +++++
> > drivers/gpu/drm/i915/display/intel_fbc.h | 2 ++
> > drivers/gpu/drm/i915/display/skl_universal_plane.c | 9 ++-------
> > 3 files changed, 9 insertions(+), 7 deletions(-)
> >
> > diff --git a/drivers/gpu/drm/i915/display/intel_fbc.c b/drivers/gpu/drm/i915/display/intel_fbc.c
> > index a1e3083022ee..435bfd05109c 100644
> > --- a/drivers/gpu/drm/i915/display/intel_fbc.c
> > +++ b/drivers/gpu/drm/i915/display/intel_fbc.c
> > @@ -129,6 +129,11 @@ struct intel_fbc {
> > const char *no_fbc_reason;
> > };
> >
> > +enum intel_fbc_id intel_fbc_id_for_pipe(enum pipe pipe)
> > +{
> > + return pipe - PIPE_A + INTEL_FBC_A;
>
> The existing usage of skl_fbc_id_for_pipe() was to call this function to
> receive a (possibly bogus) FBC ID, and then follow up with a call to
> skl_plane_has_fbc() which had checks to make sure the returned FBC ID
> actually existed on the platform. So, for example, calling
> skl_fbc_id_for_pipe(PIPE_B) on something like an ICL would return
> INTEL_FBC_B here, but then the subsequent call to skl_plane_has_fbc()
> would realize that there is no FBC_B on that platform and bail out.
> It's only relatively recently (MTL and beyond I think?) that FBC has
> become usable on pipes other than A.
>
> Now that we're promoting this function to be more general, should we
> also adjust the logic so that this function either returns a *valid* FBC
> ID or and error? Otherwise it may not be apparent to people writing new
> code that the result returned here can't be immediately trusted without
> additional checking.
The simples way to find the FBC instance for a pipe is to grab it from
the primary plane. That is already used elsewhere so won't make things
any less generic.
>
>
> Matt
>
> > +}
> > +
> > /* plane stride in pixels */
> > static unsigned int intel_fbc_plane_stride(const struct intel_plane_state *plane_state)
> > {
> > diff --git a/drivers/gpu/drm/i915/display/intel_fbc.h b/drivers/gpu/drm/i915/display/intel_fbc.h
> > index 91424563206a..3d02f3fe5630 100644
> > --- a/drivers/gpu/drm/i915/display/intel_fbc.h
> > +++ b/drivers/gpu/drm/i915/display/intel_fbc.h
> > @@ -9,6 +9,7 @@
> > #include <linux/types.h>
> >
> > enum fb_op_origin;
> > +enum pipe;
> > struct intel_atomic_state;
> > struct intel_crtc;
> > struct intel_crtc_state;
> > @@ -27,6 +28,7 @@ enum intel_fbc_id {
> > I915_MAX_FBCS,
> > };
> >
> > +enum intel_fbc_id intel_fbc_id_for_pipe(enum pipe pipe);
> > int intel_fbc_atomic_check(struct intel_atomic_state *state);
> > int intel_fbc_min_cdclk(const struct intel_crtc_state *crtc_state);
> > bool intel_fbc_pre_update(struct intel_atomic_state *state,
> > diff --git a/drivers/gpu/drm/i915/display/skl_universal_plane.c b/drivers/gpu/drm/i915/display/skl_universal_plane.c
> > index bc55fafe9ce3..275ee2903219 100644
> > --- a/drivers/gpu/drm/i915/display/skl_universal_plane.c
> > +++ b/drivers/gpu/drm/i915/display/skl_universal_plane.c
> > @@ -439,11 +439,6 @@ static int skl_plane_max_height(const struct drm_framebuffer *fb,
> > return 4096;
> > }
> >
> > -static enum intel_fbc_id skl_fbc_id_for_pipe(enum pipe pipe)
> > -{
> > - return pipe - PIPE_A + INTEL_FBC_A;
> > -}
> > -
> > static bool skl_plane_has_fbc(struct intel_display *display,
> > enum intel_fbc_id fbc_id, enum plane_id plane_id)
> > {
> > @@ -896,7 +891,7 @@ static void x3p_lpd_plane_update_pixel_normalizer(struct intel_dsb *dsb,
> > bool enable)
> > {
> > struct intel_display *display = to_intel_display(plane);
> > - enum intel_fbc_id fbc_id = skl_fbc_id_for_pipe(plane->pipe);
> > + enum intel_fbc_id fbc_id = intel_fbc_id_for_pipe(plane->pipe);
> > u32 val;
> >
> > /* Only HDR planes have pixel normalizer and don't matter if no FBC */
> > @@ -2442,7 +2437,7 @@ void icl_link_nv12_planes(struct intel_plane_state *uv_plane_state,
> > static struct intel_fbc *skl_plane_fbc(struct intel_display *display,
> > enum pipe pipe, enum plane_id plane_id)
> > {
> > - enum intel_fbc_id fbc_id = skl_fbc_id_for_pipe(pipe);
> > + enum intel_fbc_id fbc_id = intel_fbc_id_for_pipe(pipe);
> >
> > if (skl_plane_has_fbc(display, fbc_id, plane_id))
> > return display->fbc[fbc_id];
> >
> > --
> > 2.51.0
> >
>
> --
> Matt Roper
> Graphics Software Engineer
> Linux GPU Platform Enablement
> Intel Corporation
--
Ville Syrjälä
Intel
next prev parent reply other threads:[~2025-11-10 17:03 UTC|newest]
Thread overview: 50+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-11-08 0:05 [PATCH v4 00/11] drm/i915/display: Add initial support for Xe3p_LPD Gustavo Sousa
2025-11-08 0:05 ` [PATCH v4 01/11] drm/i915/wm: Do not make latency values monotonic on Xe3 onward Gustavo Sousa
2025-11-12 3:46 ` Kandpal, Suraj
2025-11-12 12:45 ` Gustavo Sousa
2025-11-08 0:05 ` [PATCH v4 02/11] drm/i915/vbt: Add fields dedicated_external and dyn_port_over_tc Gustavo Sousa
2025-11-11 16:02 ` Imre Deak
2025-11-11 16:15 ` Imre Deak
2025-11-12 13:00 ` Gustavo Sousa
2025-11-12 13:20 ` Imre Deak
2025-11-13 22:01 ` Gustavo Sousa
2025-11-08 0:05 ` [PATCH v4 03/11] drm/i915/power: Use intel_encoder_is_tc() Gustavo Sousa
2025-11-12 16:19 ` Imre Deak
2025-11-13 22:01 ` Gustavo Sousa
2025-11-08 0:05 ` [PATCH v4 04/11] drm/i915/display: Handle dedicated external ports in intel_encoder_is_tc() Gustavo Sousa
2025-11-12 16:24 ` Imre Deak
2025-11-13 22:02 ` Gustavo Sousa
2025-11-08 0:05 ` [PATCH v4 05/11] drm/i915/fbc: Add intel_fbc_id_for_pipe() Gustavo Sousa
2025-11-10 16:35 ` Matt Roper
2025-11-10 17:03 ` Ville Syrjälä [this message]
2025-11-10 22:18 ` Gustavo Sousa
2025-11-08 0:05 ` [PATCH v4 06/11] drm/i915/xe3p_lpd: Handle underrun debug bits Gustavo Sousa
2025-11-10 11:45 ` Jani Nikula
2025-11-11 0:23 ` Gustavo Sousa
2025-11-11 10:22 ` Jani Nikula
2025-11-11 12:22 ` Gustavo Sousa
2025-11-10 17:03 ` Ville Syrjälä
2025-11-10 23:42 ` Gustavo Sousa
2025-11-08 0:05 ` [PATCH v4 07/11] drm/i915/xe3p_lpd: Extend Type-C flow for static DDI allocation Gustavo Sousa
2025-11-12 17:53 ` Imre Deak
2025-11-14 19:46 ` Gustavo Sousa
2025-11-15 0:40 ` Imre Deak
2025-11-15 1:22 ` Imre Deak
2025-11-17 15:02 ` Gustavo Sousa
2025-11-17 15:17 ` Imre Deak
2025-11-17 17:23 ` Gustavo Sousa
2025-11-17 17:58 ` Imre Deak
2025-11-17 15:33 ` Gustavo Sousa
2025-11-17 16:01 ` Imre Deak
2025-11-08 0:05 ` [PATCH v4 08/11] drm/i915/nvls: Add NVL-S display support Gustavo Sousa
2025-11-08 0:05 ` [PATCH v4 09/11] drm/i915/display: Use platform check in HAS_LT_PHY() Gustavo Sousa
2025-11-08 0:05 ` [PATCH v4 10/11] drm/i915/display: Move HAS_LT_PHY() to intel_display_device.h Gustavo Sousa
2025-11-08 0:05 ` [PATCH v4 11/11] drm/i915/display: Use HAS_LT_PHY() for LT PHY AUX power Gustavo Sousa
2025-11-08 0:15 ` [PATCH v4 00/11] drm/i915/display: Add initial support for Xe3p_LPD Gustavo Sousa
2025-11-08 1:10 ` ✓ i915.CI.BAT: success for drm/i915/display: Add initial support for Xe3p_LPD (rev4) Patchwork
2025-11-08 1:52 ` ✗ CI.checkpatch: warning " Patchwork
2025-11-08 1:54 ` ✓ CI.KUnit: success " Patchwork
2025-11-08 2:09 ` ✗ CI.checksparse: warning " Patchwork
2025-11-08 2:31 ` ✗ Xe.CI.BAT: failure " Patchwork
2025-11-09 0:12 ` ✗ i915.CI.Full: " Patchwork
2025-11-09 8:10 ` ✗ Xe.CI.Full: " Patchwork
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