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From: Yao Zi <ziyao@disroot.org>
To: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>,
	Rick Chen <rick@andestech.com>, Leo <ycliang@andestech.com>
Cc: E Shattow <e@freeshell.de>, Hal Feng <hal.feng@starfivetech.com>,
	Mayuresh Chitale <mchitale@ventanamicro.com>,
	Minda Chen <minda.chen@starfivetech.com>,
	u-boot@lists.denx.de
Subject: Re: [PATCH 1/2] RISC-V: implement private GCC library
Date: Tue, 2 Dec 2025 03:57:15 +0000	[thread overview]
Message-ID: <aS5jmyp_VanBqY6h@pie> (raw)
In-Reply-To: <20251201174904.652954-2-heinrich.schuchardt@canonical.com>

On Mon, Dec 01, 2025 at 06:49:03PM +0100, Heinrich Schuchardt wrote:
> The following functions are provided:
> 
> Count leading zero bits
> 
> * int __clzsi2 (unsigned int a)
> * int __clzdi2 (unsigned long a)
> * int __clzti2 (unsigned long long a)
> 
> Count trailing zero bits
> 
> * int __ctzsi2 (unsigned int a)
> * int __ctzdi2 (unsigned long a)
> * int __ctzti2 (unsigned long long a)
> 
> Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
> ---

I noted there's another series with the same subject[1] sent almost at
the same time, and I couldn't tell the difference at the first glance.
Is this an incident?

>  arch/Kconfig            |   1 +
>  arch/riscv/lib/Makefile |   2 +
>  arch/riscv/lib/clz.c    | 105 ++++++++++++++++++++++++++++++++++++++++
>  arch/riscv/lib/ctz.c    |  95 ++++++++++++++++++++++++++++++++++++
>  lib/Kconfig             |   2 +-
>  5 files changed, 204 insertions(+), 1 deletion(-)
>  create mode 100644 arch/riscv/lib/clz.c
>  create mode 100644 arch/riscv/lib/ctz.c
> 
> diff --git a/arch/Kconfig b/arch/Kconfig
> index 3133f892f94..4af0da2485f 100644
> --- a/arch/Kconfig
> +++ b/arch/Kconfig
> @@ -159,6 +159,7 @@ config PPC
>  config RISCV
>  	bool "RISC-V architecture"
>  	select CREATE_ARCH_SYMLINK
> +	select HAVE_PRIVATE_LIBGCC if 64BIT

Are 32-bit platforms excluded for lacking of enough library functions?
Should we exclude !RISCV_ISA_F || !RISCV_ISA_D platforms as well? Though
there's no in-tree 64-bit port without F/D extension.

>  	select HAVE_SETJMP
>  	select HAVE_INITJMP
>  	select SUPPORT_ACPI

Regards,
Yao Zi

[1]: https://lore.kernel.org/u-boot/20251201174705.652626-1-zfsdt@canonical.com/

  reply	other threads:[~2025-12-02  3:57 UTC|newest]

Thread overview: 12+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-12-01 17:49 [PATCH 0/2] RISC-V: implement private GCC library Heinrich Schuchardt
2025-12-01 17:49 ` [PATCH 1/2] " Heinrich Schuchardt
2025-12-02  3:57   ` Yao Zi [this message]
2025-12-02  4:59     ` Heinrich Schuchardt
2025-12-02  5:28     ` Icenowy Zheng
2025-12-02  6:15       ` Heinrich Schuchardt
2025-12-02  7:03         ` Icenowy Zheng
2025-12-02 10:02           ` Heinrich Schuchardt
2025-12-01 17:49 ` [PATCH 2/2] test: provide unit tests for the RISC-V " Heinrich Schuchardt
  -- strict thread matches above, loose matches on Subject: below --
2025-12-01 17:47 [PATCH 0/2] RISC-V: implement " Heinrich Schuchardt
2025-12-01 17:47 ` [PATCH 1/2] " Heinrich Schuchardt
2025-12-04 11:53   ` Leo Liang
2025-12-04 11:54   ` Leo Liang

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