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From: "Roger Pau Monné" <roger.pau@citrix.com>
To: Jan Beulich <jbeulich@suse.com>
Cc: Andrew Cooper <andrew.cooper3@citrix.com>,
	xen-devel@lists.xenproject.org
Subject: Re: [PATCH 04/12] x86/irq: set accurate cpu_mask for high priority vectors used by external interrupts
Date: Fri, 21 Nov 2025 09:29:04 +0100	[thread overview]
Message-ID: <aSAi0IyDBKhqND3W@Mac.lan> (raw)
In-Reply-To: <3491d3ee-08b8-4678-9f18-5a4daa972e02@suse.com>

On Thu, Nov 20, 2025 at 02:06:39PM +0100, Jan Beulich wrote:
> On 20.11.2025 10:06, Roger Pau Monne wrote:
> > Setting the irq descriptor target CPU mask of high priority interrupts to
> > contain all online CPUs is not accurate.  External interrupts are
> > exclusively delivered using physical destination mode, and hence can only
> > target a single CPU.  Setting the descriptor CPU mask to contain all online
> > CPUs makes it impossible for Xen to figure out which CPU the interrupt is
> > really targeting.
> > 
> > Instead handle high priority vectors used by external interrupts similarly
> > to normal vectors, keeping the target CPU mask accurate.  Introduce
> > specific code in _assign_irq_vector() to deal with moving high priority
> > vectors across CPUs, this is needed at least for fixup_irqs() to be able to
> > evacuate those if the target CPU goes offline.
> > 
> > Fixes: fc0c3fa2ad5c ("x86/IO-APIC: fix setup of Xen internally used IRQs (take 2)")
> > Signed-off-by: Roger Pau Monné <roger.pau@citrix.com>
> 
> Reviewed-by: Jan Beulich <jbeulich@suse.com>
> with one further request:
> 
> > @@ -756,12 +770,10 @@ void setup_vector_irq(unsigned int cpu)
> >          if ( !irq_desc_initialized(desc) )
> >              continue;
> >          vector = irq_to_vector(irq);
> > -        if ( vector >= FIRST_HIPRIORITY_VECTOR &&
> > -             vector <= LAST_HIPRIORITY_VECTOR )
> > -            cpumask_set_cpu(cpu, desc->arch.cpu_mask);
> > -        else if ( !cpumask_test_cpu(cpu, desc->arch.cpu_mask) )
> > -            continue;
> > -        per_cpu(vector_irq, cpu)[vector] = irq;
> > +        if ( (vector >= FIRST_HIPRIORITY_VECTOR &&
> > +              vector <= LAST_HIPRIORITY_VECTOR) ||
> > +             cpumask_test_cpu(cpu, desc->arch.cpu_mask) )
> > +            per_cpu(vector_irq, cpu)[vector] = irq;
> 
> Going beyond desc->arch.cpu_mask for hiprio vectors may deserve a comment here. When
> the vector is global, this is necessary. But for e.g. the serial IRQ (which still
> moves, but isn't bound to multiple CPUs, the more normal way of respecting
> desc->arch.cpu_mask would be sufficient.

Note that hiprio vectors are handled specially in _assign_irq_vector()
and the logic to set per_cpu(vector_irq, cpu)[vector] is
short-circuited assuming that hiprio vectors are already setup on all
CPUs.

> It is merely (largely) benign if we set
> vector_irq[] also for other CPUs. "Largely" because strictly speaking if that vector
> triggered on the wrong CPU for whatever reason, we rather shouldn't treat it as a
> legitimate interrupt.

I see, yes, we could handle hiprio vectors more like normal ones and
do a bit more work in _assign_irq_vector() to also set the
vector_irq[] array at bind time, but then we would need the cleanup
logic as the interrupt migrates, which is a bit of overhead when we
know the vector won't be re-used for anything else.

What about I add the following comment:

        if ( cpumask_test_cpu(cpu, desc->arch.cpu_mask) ||
             /*
              * High-priority vectors are reserved on all CPUs.  Set
              * the vector to IRQ assignment on all CPUs, even if the
              * interrupt is not targeting this CPU.  That makes
              * shuffling those interrupts around CPUs easier.
              */
             (vector >= FIRST_HIPRIORITY_VECTOR &&
              vector <= LAST_HIPRIORITY_VECTOR) )
            per_cpu(vector_irq, cpu)[vector] = irq;

Thanks, Roger.


  reply	other threads:[~2025-11-21  8:29 UTC|newest]

Thread overview: 36+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-11-20  9:06 [PATCH 00/12] x86/irq: drop interrupt target cpumasks Roger Pau Monne
2025-11-20  9:06 ` [PATCH 01/12] x86/apic: remove cpu_mask_to_apicid hook Roger Pau Monne
2025-11-20 12:19   ` Jan Beulich
2025-11-20 12:25   ` Andrew Cooper
2025-11-20  9:06 ` [PATCH 02/12] x86/apic: remove vector_allocation_cpumask hook Roger Pau Monne
2025-11-20 12:25   ` Jan Beulich
2025-11-20 12:30   ` Andrew Cooper
2025-11-20  9:06 ` [PATCH 03/12] x86/irq: introduce local irq_desc Roger Pau Monne
2025-11-20 12:39   ` Andrew Cooper
2025-11-20  9:06 ` [PATCH 04/12] x86/irq: set accurate cpu_mask for high priority vectors used by external interrupts Roger Pau Monne
2025-11-20 12:45   ` Andrew Cooper
2025-11-20 12:53     ` Jan Beulich
2025-11-20 13:06   ` Jan Beulich
2025-11-21  8:29     ` Roger Pau Monné [this message]
2025-11-24 10:16       ` Jan Beulich
2025-11-20  9:06 ` [PATCH 05/12] x86/io-apic: purge usage of logical mode Roger Pau Monne
2025-11-20 13:18   ` Andrew Cooper
2025-11-20 14:27     ` Jan Beulich
2025-11-20 18:30       ` Andrew Cooper
2025-11-21  7:38         ` Jan Beulich
2025-11-20  9:58 ` [PATCH 06/12] x86/i8259: redo workaround for AMD spurious PIC interrupts Roger Pau Monne
2025-11-20  9:58   ` [PATCH 07/12] x86/io-apic: fix usage of setup_ioapic_dest() Roger Pau Monne
2025-11-20 16:02     ` Jan Beulich
2025-11-20  9:58   ` [PATCH 08/12] x86/irq: adjust bind_irq_vector() to take a single CPU as parameter Roger Pau Monne
2025-11-24 10:52     ` Jan Beulich
2025-11-20  9:58   ` [PATCH 09/12] x86/irq: convert cpumask parameter to integer in {,p}irq_set_affinity() Roger Pau Monne
2025-11-24 11:20     ` Jan Beulich
2025-11-20  9:58   ` [PATCH 10/12] x86/irq: convert irq_desc cpu_mask field to integer Roger Pau Monne
2025-11-24 12:01     ` Jan Beulich
2025-11-20  9:58   ` [PATCH 11/12] x86/irq: convert irq_desc old_cpu_mask " Roger Pau Monne
2025-11-24 12:54     ` Jan Beulich
2025-11-20  9:58   ` [PATCH 12/12] x86/irq: convert irq_desc pending_mask " Roger Pau Monne
2025-11-24 12:57     ` Jan Beulich
2025-11-20 15:05   ` [PATCH 06/12] x86/i8259: redo workaround for AMD spurious PIC interrupts Jan Beulich
2025-11-21  8:35     ` Roger Pau Monné
2025-11-24 10:20       ` Jan Beulich

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