[Intel IOMMU] Question about memory ordering in context/PASID entry updates

[Dmytro Maluka <dmaluka@chromium.org>]

When updating a context or PASID entry, we'd better make sure we set the
present bit after setting up other bits, not before, right? And indeed,
for example, in domain_context_mapping_one() we are doing it in the
following order:

	context_clear_entry(context);
	<set other bits>
	context_set_present(context);

But it doesn't look like we have any compiler barriers to actually
ensure this order? (And in case of context entries, there is even no
WRITE_ONCE or anything like that.)

So, are we just hoping that the compiler will not reorder it?

What am I missing?