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Tsirkin" Cc: qemu-devel@nongnu.org, stefanha@redhat.com, akihiko.odaki@daynix.com, qemu-stable@nongnu.org Subject: Re: [PATCH] pcie_sriov: Fix PCI_SRIOV_* accesses in pcie_sriov_pf_exit() Message-ID: References: <20251205145718.55136-1-kwolf@redhat.com> <20251205100242-mutt-send-email-mst@kernel.org> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20251205100242-mutt-send-email-mst@kernel.org> X-Scanned-By: MIMEDefang 3.4.1 on 10.30.177.111 Received-SPF: pass client-ip=170.10.129.124; envelope-from=kwolf@redhat.com; helo=us-smtp-delivery-124.mimecast.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.001, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_MSPIKE_H2=0.001, RCVD_IN_VALIDITY_RPBL_BLOCKED=0.001, RCVD_IN_VALIDITY_SAFE_BLOCKED=0.001, SPF_HELO_PASS=-0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Am 05.12.2025 um 16:03 hat Michael S. Tsirkin geschrieben: > On Fri, Dec 05, 2025 at 03:57:18PM +0100, Kevin Wolf wrote: > > PCI_SRIOV_* are offsets into the SR-IOV capability, not into the PCI > > config space. pcie_sriov_pf_exit() erroneously takes them as the latter, > > which makes it read PCI_HEADER_TYPE and PCI_BIST when it tries to read > > PCI_SRIOV_TOTAL_VF. > > > > In many cases we're lucky enough that the PCI config space will be 0 > > there, so we just skip the whole for loop, but this isn't guaranteed. > > For example, setting the multifunction bit on the PF and then doing a > > 'device_del' on it will get a larger number and cause a segfault. > > > > Fix this and access the real PCI_SRIOV_* fields in the capability. > > > > Cc: qemu-stable@nongnu.org > > Fixes: 19e55471d4e8 ('pcie_sriov: Allow user to create SR-IOV device') > > Signed-off-by: Kevin Wolf > > Thanks for the patch! something small to improve: > > > --- > > hw/pci/pcie_sriov.c | 9 +++++---- > > 1 file changed, 5 insertions(+), 4 deletions(-) > > > > diff --git a/hw/pci/pcie_sriov.c b/hw/pci/pcie_sriov.c > > index c4f88f09757..d467284cbda 100644 > > --- a/hw/pci/pcie_sriov.c > > +++ b/hw/pci/pcie_sriov.c > > @@ -195,14 +195,17 @@ bool pcie_sriov_pf_init(PCIDevice *dev, uint16_t offset, > > > > void pcie_sriov_pf_exit(PCIDevice *dev) > > { > > + uint8_t *cfg; > > + > > if (dev->exp.sriov_cap == 0) { > > return; > > } > > + cfg = dev->config + dev->exp.sriov_cap; > > initialize cfg at the point of declaration maybe? I think it would > be clearer. That's what I had first, then changed it to make it clearer that the pointer is only guaranteed to be valid after the dev->exp.sriov_cap check. But either way works for me. Let me know if I should send a v2 that puts it back on the top. Kevin