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From: Oliver Upton <oupton@kernel.org>
To: Colton Lewis <coltonlewis@google.com>
Cc: kvm@vger.kernel.org, Paolo Bonzini <pbonzini@redhat.com>,
	Jonathan Corbet <corbet@lwn.net>,
	Russell King <linux@armlinux.org.uk>,
	Catalin Marinas <catalin.marinas@arm.com>,
	Will Deacon <will@kernel.org>, Marc Zyngier <maz@kernel.org>,
	Oliver Upton <oliver.upton@linux.dev>,
	Mingwei Zhang <mizhang@google.com>,
	Joey Gouly <joey.gouly@arm.com>,
	Suzuki K Poulose <suzuki.poulose@arm.com>,
	Zenghui Yu <yuzenghui@huawei.com>,
	Mark Rutland <mark.rutland@arm.com>,
	Shuah Khan <shuah@kernel.org>,
	Ganapatrao Kulkarni <gankulkarni@os.amperecomputing.com>,
	linux-doc@vger.kernel.org, linux-kernel@vger.kernel.org,
	linux-arm-kernel@lists.infradead.org, kvmarm@lists.linux.dev,
	linux-perf-users@vger.kernel.org,
	linux-kselftest@vger.kernel.org
Subject: Re: [PATCH v5 12/24] KVM: arm64: Use physical PMSELR for PMXEVTYPER if partitioned
Date: Tue, 9 Dec 2025 13:14:03 -0800	[thread overview]
Message-ID: <aTiRG0I1FZzntHtH@kernel.org> (raw)
In-Reply-To: <20251209205121.1871534-13-coltonlewis@google.com>

On Tue, Dec 09, 2025 at 08:51:09PM +0000, Colton Lewis wrote:
> Because PMXEVTYPER is trapped and PMSELR is not, it is not appropriate
> to use the virtual PMSELR register when it could be outdated and lead
> to an invalid write. Use the physical register when partitioned.
> 
> Signed-off-by: Colton Lewis <coltonlewis@google.com>
> ---
>  arch/arm64/include/asm/arm_pmuv3.h | 7 ++++++-
>  arch/arm64/kvm/sys_regs.c          | 9 +++++++--
>  2 files changed, 13 insertions(+), 3 deletions(-)
> 
> diff --git a/arch/arm64/include/asm/arm_pmuv3.h b/arch/arm64/include/asm/arm_pmuv3.h
> index 27c4d6d47da31..60600f04b5902 100644
> --- a/arch/arm64/include/asm/arm_pmuv3.h
> +++ b/arch/arm64/include/asm/arm_pmuv3.h
> @@ -70,11 +70,16 @@ static inline u64 read_pmcr(void)
>  	return read_sysreg(pmcr_el0);
>  }
>  
> -static inline void write_pmselr(u32 val)
> +static inline void write_pmselr(u64 val)
>  {
>  	write_sysreg(val, pmselr_el0);
>  }
>  
> +static inline u64 read_pmselr(void)
> +{
> +	return read_sysreg(pmselr_el0);
> +}
> +
>  static inline void write_pmccntr(u64 val)
>  {
>  	write_sysreg(val, pmccntr_el0);
> diff --git a/arch/arm64/kvm/sys_regs.c b/arch/arm64/kvm/sys_regs.c
> index 0c9596325519b..2e6d907fa8af2 100644
> --- a/arch/arm64/kvm/sys_regs.c
> +++ b/arch/arm64/kvm/sys_regs.c
> @@ -1199,14 +1199,19 @@ static bool writethrough_pmevtyper(struct kvm_vcpu *vcpu, struct sys_reg_params
>  static bool access_pmu_evtyper(struct kvm_vcpu *vcpu, struct sys_reg_params *p,
>  			       const struct sys_reg_desc *r)
>  {
> -	u64 idx, reg;
> +	u64 idx, reg, pmselr;
>  
>  	if (pmu_access_el0_disabled(vcpu))
>  		return false;
>  
>  	if (r->CRn == 9 && r->CRm == 13 && r->Op2 == 1) {
>  		/* PMXEVTYPER_EL0 */
> -		idx = SYS_FIELD_GET(PMSELR_EL0, SEL, __vcpu_sys_reg(vcpu, PMSELR_EL0));
> +		if (kvm_vcpu_pmu_is_partitioned(vcpu))
> +			pmselr = read_pmselr();
> +		else
> +			pmselr = __vcpu_sys_reg(vcpu, PMSELR_EL0);

This isn't preemption safe. Nor should the "if (partitioned) do X else do Y" get
open-coded throughout the shop.

I would rather this be handled with a prepatory patch that provides
generic PMU register accessors to the rest of KVM (e.g.
vcpu_read_pmu_reg() / vcpu_write_pmu_reg()). Internally those helpers
can locate the vCPU's PMU registers (emulated, partitioned in-memory,
partitioned in-CPU).

Thanks,
Oliver

  reply	other threads:[~2025-12-09 21:14 UTC|newest]

Thread overview: 64+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-12-09 20:50 [PATCH v5 00/24] ARM64 PMU Partitioning Colton Lewis
2025-12-09 20:50 ` [PATCH v5 01/24] arm64: cpufeature: Add cpucap for HPMN0 Colton Lewis
2025-12-10 10:54   ` Suzuki K Poulose
2025-12-12 19:22     ` Colton Lewis
2025-12-09 20:50 ` [PATCH v5 02/24] KVM: arm64: Move arm_{psci,hypercalls}.h to an internal KVM path Colton Lewis
2025-12-09 20:51 ` [PATCH v5 03/24] KVM: arm64: Include KVM headers to get forward declarations Colton Lewis
2025-12-09 20:51 ` [PATCH v5 04/24] KVM: arm64: Move ARM specific headers in include/kvm to arch directory Colton Lewis
2025-12-09 20:51 ` [PATCH v5 05/24] KVM: arm64: Reorganize PMU includes Colton Lewis
2025-12-09 20:51 ` [PATCH v5 06/24] KVM: arm64: Reorganize PMU functions Colton Lewis
2025-12-09 20:51 ` [PATCH v5 07/24] perf: arm_pmuv3: Introduce method to partition the PMU Colton Lewis
2025-12-09 20:51 ` [PATCH v5 08/24] perf: arm_pmuv3: Generalize counter bitmasks Colton Lewis
2025-12-09 20:51 ` [PATCH v5 09/24] perf: arm_pmuv3: Keep out of guest counter partition Colton Lewis
2025-12-10 20:21   ` kernel test robot
2025-12-12 20:29     ` Colton Lewis
2025-12-09 20:51 ` [PATCH v5 10/24] KVM: arm64: Set up FGT for Partitioned PMU Colton Lewis
2025-12-09 21:08   ` Oliver Upton
2025-12-12 20:51     ` Colton Lewis
2025-12-17  0:13       ` Oliver Upton
2025-12-09 20:51 ` [PATCH v5 11/24] KVM: arm64: Writethrough trapped PMEVTYPER register Colton Lewis
2025-12-10 18:31   ` kernel test robot
2025-12-12 20:27     ` Colton Lewis
2025-12-09 20:51 ` [PATCH v5 12/24] KVM: arm64: Use physical PMSELR for PMXEVTYPER if partitioned Colton Lewis
2025-12-09 21:14   ` Oliver Upton [this message]
2025-12-12 20:54     ` Colton Lewis
2025-12-09 20:51 ` [PATCH v5 13/24] KVM: arm64: Writethrough trapped PMOVS register Colton Lewis
2025-12-09 21:19   ` Oliver Upton
2025-12-12 21:06     ` Colton Lewis
2025-12-09 20:51 ` [PATCH v5 14/24] KVM: arm64: Write fast path PMU register handlers Colton Lewis
2025-12-17  0:38   ` Oliver Upton
2025-12-17 23:03     ` Colton Lewis
2025-12-09 20:51 ` [PATCH v5 15/24] KVM: arm64: Setup MDCR_EL2 to handle a partitioned PMU Colton Lewis
2025-12-09 21:33   ` Oliver Upton
2025-12-12 21:22     ` Colton Lewis
2025-12-09 20:51 ` [PATCH v5 16/24] KVM: arm64: Account for partitioning in PMCR_EL0 access Colton Lewis
2025-12-09 21:37   ` Oliver Upton
2025-12-12 21:31     ` Colton Lewis
2025-12-09 20:51 ` [PATCH v5 17/24] KVM: arm64: Context swap Partitioned PMU guest registers Colton Lewis
2025-12-09 21:55   ` Oliver Upton
2025-12-12 21:57     ` Colton Lewis
2025-12-09 20:51 ` [PATCH v5 18/24] KVM: arm64: Enforce PMU event filter at vcpu_load() Colton Lewis
2025-12-09 22:00   ` Oliver Upton
2025-12-12 21:59     ` Colton Lewis
2025-12-17  0:57   ` Oliver Upton
2025-12-17 23:05     ` Colton Lewis
2025-12-09 20:51 ` [PATCH v5 19/24] KVM: arm64: Implement lazy PMU context swaps Colton Lewis
2025-12-09 22:06   ` Oliver Upton
2025-12-12 22:25     ` Colton Lewis
2025-12-15 18:06       ` Oliver Upton
2025-12-09 20:51 ` [PATCH v5 20/24] perf: arm_pmuv3: Handle IRQs for Partitioned PMU guest counters Colton Lewis
2025-12-09 22:45   ` Oliver Upton
2025-12-12 22:36     ` Colton Lewis
2025-12-09 20:51 ` [PATCH v5 21/24] KVM: arm64: Inject recorded guest interrupts Colton Lewis
2025-12-09 22:52   ` Oliver Upton
2025-12-12 22:55     ` Colton Lewis
2025-12-15 17:50       ` Oliver Upton
2025-12-09 20:51 ` [PATCH v5 22/24] KVM: arm64: Add KVM_CAP to partition the PMU Colton Lewis
2025-12-09 22:58   ` Oliver Upton
2025-12-12 22:59     ` Colton Lewis
2025-12-09 20:51 ` [PATCH v5 23/24] KVM: selftests: Add find_bit to KVM library Colton Lewis
2025-12-09 20:51 ` [PATCH v5 24/24] KVM: arm64: selftests: Add test case for partitioned PMU Colton Lewis
2025-12-09 23:00 ` [PATCH v5 00/24] ARM64 PMU Partitioning Oliver Upton
2026-01-15 13:02   ` Will Deacon
2026-01-15 18:09     ` Colton Lewis
2026-04-14 19:55       ` Colton Lewis

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