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Thu, 18 Dec 2025 02:06:21 -0800 (PST) Date: Thu, 18 Dec 2025 11:06:08 +0100 From: Stephan Gerhold To: Abel Vesa Cc: Wim Van Sebroeck , Guenter Roeck , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Rajendra Nayak , Bjorn Andersson , Konrad Dybcio , linux-arm-msm@vger.kernel.org, linux-watchdog@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: Re: [PATCH 2/2] arm64: dts: qcom: x1-el2: Add the APSS watchdog Message-ID: References: <20251214-arm64-dts-qcom-x1e80100-el2-add-apss-wdt-v1-0-94ee80b8cbe7@oss.qualcomm.com> <20251214-arm64-dts-qcom-x1e80100-el2-add-apss-wdt-v1-2-94ee80b8cbe7@oss.qualcomm.com> Precedence: bulk X-Mailing-List: linux-arm-msm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20251214-arm64-dts-qcom-x1e80100-el2-add-apss-wdt-v1-2-94ee80b8cbe7@oss.qualcomm.com> On Sun, Dec 14, 2025 at 10:49:59PM +0200, Abel Vesa wrote: > The watchdog support in EL1 is SBSA compliant, handled by Gunyah > hypervisor, but in EL2. the watchdog is an instance of the APSS WDT HW > block, same as older platforms. So describe the APSS WDT node in the EL2 > overlay. > > Signed-off-by: Abel Vesa > --- > arch/arm64/boot/dts/qcom/x1-el2.dtso | 16 ++++++++++++++++ > 1 file changed, 16 insertions(+) > > diff --git a/arch/arm64/boot/dts/qcom/x1-el2.dtso b/arch/arm64/boot/dts/qcom/x1-el2.dtso > index 2d1c9151cf1b..404174a15659 100644 > --- a/arch/arm64/boot/dts/qcom/x1-el2.dtso > +++ b/arch/arm64/boot/dts/qcom/x1-el2.dtso > @@ -7,6 +7,8 @@ > /dts-v1/; > /plugin/; > > +#include > + > /* We can't and don't need to use zap shader in EL2 as linux can zap the gpu on it's own. */ > &gpu_zap_shader { > status = "disabled"; > @@ -55,3 +57,17 @@ &pcie_smmu { > &sbsa_watchdog { > status = "disabled"; > }; > + > +&soc { > + #address-cells = <2>; > + #size-cells = <2>; > + > + /* The APSS watchdog is only accessible in EL2 */ > + watchdog@17410000 { > + compatible = "qcom,apss-wdt-x1e80100", "qcom,kpss-wdt"; > + reg = <0x0 0x17410000 0x0 0x1000>; > + clocks = <&sleep_clk>; > + interrupts = ; > + interrupt-parent = <&intc>; > + }; For consistency with &pcie_smmu, I think it would be cleaner to put this into hamoa.dtsi, mark it as status = "reserved"; and then enable it here in the overlay. That way, we have a full hardware description in hamoa.dtsi. You should also be able to drop the interrupt-parent if you move it there. Thanks, Stephan