From: Stephan Gerhold <stephan.gerhold@linaro.org>
To: Pankaj Patil <pankaj.patil@oss.qualcomm.com>
Cc: Bjorn Andersson <andersson@kernel.org>,
Konrad Dybcio <konradybcio@kernel.org>,
Rob Herring <robh@kernel.org>,
Krzysztof Kozlowski <krzk+dt@kernel.org>,
Conor Dooley <conor+dt@kernel.org>,
linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org,
linux-kernel@vger.kernel.org, rajendra.nayak@oss.qualcomm.com,
sibi.sankar@oss.qualcomm.com,
Kamal Wadhwa <kamal.wadhwa@oss.qualcomm.com>,
Qiang Yu <qiang.yu@oss.qualcomm.com>,
Jyothi Kumar Seerapu <jyothi.seerapu@oss.qualcomm.com>
Subject: Re: [PATCH v3 4/4] arm64: dts: qcom: glymur: Enable Glymur CRD board support
Date: Mon, 22 Dec 2025 12:17:47 +0100 [thread overview]
Message-ID: <aUko20ORsgrlZrIn@linaro.org> (raw)
In-Reply-To: <20251219-upstream_v3_glymur_introduction-v3-4-32271f1f685d@oss.qualcomm.com>
On Fri, Dec 19, 2025 at 08:16:57PM +0530, Pankaj Patil wrote:
> Add initial device tree support for the Glymur Compute Reference
> Device(CRD) board, with this board dts glymur crd can boot to shell
> with rootfs on nvme and uart21 as serial console
>
> Features enabled are:
> - Regulators 0 - 4
> - Power supplies and sideband signals (PERST, WAKE, CLKREQ) for
> PCIe3b/4/5/6 controllers and PHYs
> - QUPv3 instances
> - PMIC thermal-zone updates
>
> Co-developed-by: Kamal Wadhwa <kamal.wadhwa@oss.qualcomm.com>
> Signed-off-by: Kamal Wadhwa <kamal.wadhwa@oss.qualcomm.com>
> Co-developed-by: Qiang Yu <qiang.yu@oss.qualcomm.com>
> Signed-off-by: Qiang Yu <qiang.yu@oss.qualcomm.com>
> Co-developed-by: Sibi Sankar <sibi.sankar@oss.qualcomm.com>
> Signed-off-by: Sibi Sankar <sibi.sankar@oss.qualcomm.com>
> Co-developed-by: Jyothi Kumar Seerapu <jyothi.seerapu@oss.qualcomm.com>
> Signed-off-by: Jyothi Kumar Seerapu <jyothi.seerapu@oss.qualcomm.com>
> Signed-off-by: Pankaj Patil <pankaj.patil@oss.qualcomm.com>
> ---
> arch/arm64/boot/dts/qcom/Makefile | 1 +
> arch/arm64/boot/dts/qcom/glymur-crd.dts | 860 ++++++++++++++++++++++++++++++++
> 2 files changed, 861 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/qcom/Makefile b/arch/arm64/boot/dts/qcom/Makefile
> index 6f34d5ed331c..6ff911cca06c 100644
> --- a/arch/arm64/boot/dts/qcom/Makefile
> +++ b/arch/arm64/boot/dts/qcom/Makefile
> @@ -13,6 +13,7 @@ dtb-$(CONFIG_ARCH_QCOM) += apq8039-t2.dtb
> dtb-$(CONFIG_ARCH_QCOM) += apq8094-sony-xperia-kitakami-karin_windy.dtb
> dtb-$(CONFIG_ARCH_QCOM) += apq8096-db820c.dtb
> dtb-$(CONFIG_ARCH_QCOM) += apq8096-ifc6640.dtb
> +dtb-$(CONFIG_ARCH_QCOM) += glymur-crd.dtb
> dtb-$(CONFIG_ARCH_QCOM) += hamoa-iot-evk.dtb
> dtb-$(CONFIG_ARCH_QCOM) += ipq5018-rdp432-c2.dtb
> dtb-$(CONFIG_ARCH_QCOM) += ipq5018-tplink-archer-ax55-v1.dtb
> diff --git a/arch/arm64/boot/dts/qcom/glymur-crd.dts b/arch/arm64/boot/dts/qcom/glymur-crd.dts
> new file mode 100644
> index 000000000000..7c168e813f1e
> --- /dev/null
> +++ b/arch/arm64/boot/dts/qcom/glymur-crd.dts
> @@ -0,0 +1,860 @@
> +// SPDX-License-Identifier: BSD-3-Clause
> +/*
> + * Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries.
> + */
> +
> +/dts-v1/;
> +
> +#include "glymur.dtsi"
> +#include "glymur-pmics.dtsi"
> +#include <dt-bindings/regulator/qcom,rpmh-regulator.h>
> +
> +/ {
> + model = "Qualcomm Technologies, Inc. Glymur CRD";
> + compatible = "qcom,glymur-crd", "qcom,glymur";
> +
> + aliases {
> + serial0 = &uart21;
> + serial1 = &uart14;
> + i2c0 = &i2c0;
> + i2c1 = &i2c4;
> + i2c2 = &i2c5;
> + spi0 = &spi18;
> + };
> +
> + chosen {
> + stdout-path = "serial0:115200n8";
> + };
> +
> + clocks {
> + xo_board: xo-board {
> + compatible = "fixed-clock";
> + clock-frequency = <38400000>;
> + #clock-cells = <0>;
> + };
> +
> + sleep_clk: sleep-clk {
> + compatible = "fixed-clock";
> + clock-frequency = <32000>;
> + #clock-cells = <0>;
> + };
> + };
> +
> + gpio-keys {
> + compatible = "gpio-keys";
> +
> + pinctrl-0 = <&key_vol_up_default>;
> + pinctrl-names = "default";
> +
> + key-volume-up {
> + label = "Volume Up";
> + linux,code = <KEY_VOLUMEUP>;
> + gpios = <&pmh0101_gpios 6 GPIO_ACTIVE_LOW>;
> + debounce-interval = <15>;
> + linux,can-disable;
> + wakeup-source;
> + };
> + };
> +
> + vreg_nvme: regulator-nvme {
> + compatible = "regulator-fixed";
> +
> + regulator-name = "VREG_NVME_3P3";
> + regulator-min-microvolt = <3300000>;
> + regulator-max-microvolt = <3300000>;
> +
> + gpio = <&pmh0101_gpios 14 GPIO_ACTIVE_HIGH>;
> + enable-active-high;
> +
> + pinctrl-0 = <&nvme_reg_en>;
> + pinctrl-names = "default";
This should be probably "regulator-boot-on" to avoid temporarily
powering off the regulator during boot.
> + };
> +
> + vreg_nvme_sec: regulator-nvme-sec {
> + compatible = "regulator-fixed";
> +
> + regulator-name = "VREG_NVME_SEC_3P3";
> + regulator-min-microvolt = <3300000>;
> + regulator-max-microvolt = <3300000>;
> +
> + gpio = <&pmh0110_f_e1_gpios 14 GPIO_ACTIVE_HIGH>;
> + enable-active-high;
> +
> + pinctrl-0 = <&nvme_sec_reg_en>;
> + pinctrl-names = "default";
Maybe this one too, not sure.
> + };
> +
> + vreg_wlan: regulator-wlan {
> + compatible = "regulator-fixed";
> +
> + regulator-name = "VREG_WLAN_3P3";
> + regulator-min-microvolt = <3300000>;
> + regulator-max-microvolt = <3300000>;
> +
> + gpio = <&tlmm 94 GPIO_ACTIVE_HIGH>;
> + enable-active-high;
> +
> + pinctrl-names = "default";
> + pinctrl-0 = <&wlan_reg_en>;
This one too, if it is already turned on during boot.
> + };
> +
> + vreg_wwan: regulator-wwan {
> + compatible = "regulator-fixed";
> +
> + regulator-name = "VREG_WWAN_3P3";
> + regulator-min-microvolt = <3300000>;
> + regulator-max-microvolt = <3300000>;
> +
> + gpio = <&tlmm 246 GPIO_ACTIVE_HIGH>;
> + enable-active-high;
> +
> + pinctrl-names = "default";
> + pinctrl-0 = <&wwan_reg_en>;
Yeah ...
> + };
> +
> + vph_pwr: regulator-vph-pwr {
> + compatible = "regulator-fixed";
> + regulator-name = "vph_pwr";
> + regulator-min-microvolt = <3700000>;
> + regulator-max-microvolt = <3700000>;
regulator-always-on;
regulator-boot-on;
> + };
> +
> + thermal-zones {
> + pmh0101-thermal {
I guess these could be device-specific, but I doubt they ever will be in
practice. Can you put these in the PMIC dtsi or the glymur-pmics.dtsi to
avoid duplication?
> + polling-delay-passive = <100>;
> + thermal-sensors = <&pmh0101_temp_alarm>;
> +
> + trips {
> + trip0 {
> + temperature = <95000>;
> + hysteresis = <0>;
> + type = "passive";
> + };
> +
> + trip1 {
> + temperature = <115000>;
> + hysteresis = <0>;
> + type = "hot";
Given the temperature, it feels like this one should be "critical".
> + };
> + };
> + };
> +
> [...]
Thanks,
Stephan
next prev parent reply other threads:[~2025-12-22 11:18 UTC|newest]
Thread overview: 25+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-12-19 14:46 [PATCH v3 0/4] arm64: dts: qcom: Introduce Glymur SoC dtsi and Glymur CRD dts Pankaj Patil
2025-12-19 14:46 ` [PATCH v3 1/4] dt-bindings: arm: qcom: Document Glymur SoC and board Pankaj Patil
2025-12-19 14:46 ` [PATCH v3 2/4] arm64: defconfig: Enable Glymur configs for boot to shell Pankaj Patil
2025-12-19 14:57 ` Krzysztof Kozlowski
2025-12-20 17:14 ` Dmitry Baryshkov
2025-12-22 8:54 ` Pankaj Patil
2025-12-20 17:17 ` Dmitry Baryshkov
2025-12-22 10:24 ` Pankaj Patil
2025-12-19 14:46 ` [PATCH v3 3/4] arm64: dts: qcom: Introduce Glymur base dtsi Pankaj Patil
2025-12-20 18:46 ` Dmitry Baryshkov
2025-12-21 2:49 ` Dmitry Baryshkov
2025-12-21 15:17 ` Abel Vesa
2025-12-22 3:36 ` Bjorn Andersson
2025-12-22 9:10 ` Abel Vesa
2025-12-22 10:11 ` Kamal Wadhwa
2025-12-22 10:56 ` Stephan Gerhold
2025-12-30 8:02 ` Pankaj Patil
2025-12-30 14:30 ` Konrad Dybcio
2025-12-19 14:46 ` [PATCH v3 4/4] arm64: dts: qcom: glymur: Enable Glymur CRD board support Pankaj Patil
2025-12-20 18:48 ` Dmitry Baryshkov
2025-12-22 11:17 ` Stephan Gerhold [this message]
2025-12-30 14:45 ` Konrad Dybcio
2026-02-23 19:56 ` (subset) [PATCH v3 0/4] arm64: dts: qcom: Introduce Glymur SoC dtsi and Glymur CRD dts Bjorn Andersson
2026-02-23 20:31 ` Bjorn Andersson
2026-02-23 20:34 ` Krzysztof Kozlowski
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