From: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
To: Vladimir Oltean <vladimir.oltean@nxp.com>
Cc: netdev@vger.kernel.org, Andrew Lunn <andrew@lunn.ch>,
Heiner Kallweit <hkallweit1@gmail.com>,
Russell King <linux@armlinux.org.uk>,
"David S. Miller" <davem@davemloft.net>,
Eric Dumazet <edumazet@google.com>,
Jakub Kicinski <kuba@kernel.org>, Paolo Abeni <pabeni@redhat.com>,
linux-kernel@vger.kernel.org,
Herve Codina <herve.codina@bootlin.com>,
Mark Brown <broonie@kernel.org>,
Serge Semin <fancer.lancer@gmail.com>,
Maxime Chevallier <maxime.chevallier@bootlin.com>,
Lee Jones <lee@kernel.org>, Rob Herring <robh@kernel.org>,
Krzysztof Kozlowski <krzk+dt@kernel.org>,
Conor Dooley <conor+dt@kernel.org>,
devicetree@vger.kernel.org,
Choong Yong Liang <yong.liang.choong@linux.intel.com>,
Jiawen Wu <jiawenwu@trustnetic.com>
Subject: Re: [PATCH v2 net-next 02/15] net: mdio: add driver for NXP SJA1110 100BASE-T1 embedded PHYs
Date: Thu, 22 Jan 2026 16:44:47 +0200 [thread overview]
Message-ID: <aXI339TiHFaEAWXE@smile.fi.intel.com> (raw)
In-Reply-To: <20260122124708.pxckp6vgi2rvagmm@skbuf>
On Thu, Jan 22, 2026 at 02:47:08PM +0200, Vladimir Oltean wrote:
> On Thu, Jan 22, 2026 at 02:12:21PM +0200, Andy Shevchenko wrote:
> > On Thu, Jan 22, 2026 at 12:56:41PM +0200, Vladimir Oltean wrote:
...
> > > +static int sja1110_base_t1_mdio_read_c22(struct mii_bus *bus, int phy, int reg)
> > > +{
> > > + struct sja1110_base_t1_private *priv = bus->priv;
> > > + struct regmap *regmap = priv->regmap;
> > > + unsigned int addr, val;
> > > + int err;
> > > +
> > > + addr = sja1110_base_t1_encode_addr(phy, SJA1110_C22, reg & 0x1f);
> >
> > GENMASK() ? Or do you have already a defined mask for this?
>
> Hmm, I can't find a definition for this. In the MDIO world it is
> "well known" that clause 22 offers a 5-bit register address space.
> So the 0x1f number doesn't seem too magical to me.
>
> But I think my assumptions date since before the MDIO bus API was split
> between separate clause 22 and clause 45 reads/writes. I don't know
> whether masking reg & 0x1f is the best practice. I'm surprised that
> __mdiobus_read() doesn't enforce a limit on "regnum", and I don't see
> other MDIO bus drivers explicitly C22 registers >= 32. I really don't
> know what is the best practice.
Me neither. At bare minimum to check / perform two things:
- make sure this approach is consistent across the kernel
- define the magic with meaningful name
Maybe (assuming second one is done) fix the rest in the future
via some helper function?
...
> > > +static int sja1110_base_t1_mdio_probe(struct platform_device *pdev)
> > > +{
> > > + struct sja1110_base_t1_private *priv;
> > > + struct device *dev = &pdev->dev;
> > > + struct regmap *regmap;
> > > + struct resource *res;
> > > + struct mii_bus *bus;
> > > + int err;
> >
> > > + if (!dev->of_node || !dev->parent)
> >
> > Can we avoid dereferencing? And perhaps dev_fwnode(dev)?
>
> Avoid dereferencing what?
of_node
> > > + return -ENODEV;
> > > +
> > > + regmap = dev_get_regmap(dev->parent, NULL);
> > > + if (!regmap)
> > > + return -ENODEV;
> > > +
> > > + bus = mdiobus_alloc_size(sizeof(*priv));
> > > + if (!bus)
> > > + return -ENOMEM;
> > > +
> > > + bus->name = "SJA1110 100base-T1 MDIO bus";
> > > + snprintf(bus->id, MII_BUS_ID_SIZE, "%s", dev_name(dev));
> > > + bus->read = sja1110_base_t1_mdio_read_c22;
> > > + bus->write = sja1110_base_t1_mdio_write_c22;
> > > + bus->read_c45 = sja1110_base_t1_mdio_read_c45;
> > > + bus->write_c45 = sja1110_base_t1_mdio_write_c45;
> > > + bus->parent = dev;
> > > + priv = bus->priv;
> > > + priv->regmap = regmap;
> > > +
> > > + res = platform_get_resource(pdev, IORESOURCE_REG, 0);
> > > + if (res)
> > > + priv->base = res->start;
> > > +
> > > + err = of_mdiobus_register(bus, dev->of_node);
>
> Why would I use dev_fwnode() if I need to pass it as OF to
> of_mdiobus_register() here?
dev_of_node() then. Wondering if we can use fwnode_mdiobus_register_phy() here
(I remember that OF/fwnode code in MDIO/PHY is not trivial, but I don't know
all the details).
> > > + if (err)
> > > + goto err_free_bus;
> > > +
> > > + priv->bus = bus;
> > > + platform_set_drvdata(pdev, priv);
> > > +
> > > + return 0;
> > > +
> > > +err_free_bus:
> > > + mdiobus_free(bus);
> > > +
> > > + return err;
> > > +}
--
With Best Regards,
Andy Shevchenko
next prev parent reply other threads:[~2026-01-22 14:44 UTC|newest]
Thread overview: 49+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-01-22 10:56 [PATCH v2 net-next 00/15] Probe SJA1105 DSA children as platform sub-devices Vladimir Oltean
2026-01-22 10:56 ` [PATCH v2 net-next 01/15] net: mdio-regmap: permit working with non-MMIO regmaps Vladimir Oltean
2026-01-22 12:06 ` Andy Shevchenko
2026-01-22 12:13 ` Vladimir Oltean
2026-01-22 12:16 ` Russell King (Oracle)
2026-01-22 12:21 ` Vladimir Oltean
2026-01-22 13:47 ` Vladimir Oltean
2026-01-22 14:38 ` Andy Shevchenko
2026-01-22 22:18 ` Vladimir Oltean
2026-01-23 7:20 ` Andy Shevchenko
2026-01-23 12:15 ` Vladimir Oltean
2026-01-23 13:55 ` Vladimir Oltean
2026-01-23 14:31 ` Andy Shevchenko
2026-01-23 15:10 ` Vladimir Oltean
2026-01-23 15:39 ` Andy Shevchenko
2026-01-23 15:54 ` Andy Shevchenko
2026-01-23 14:23 ` Andy Shevchenko
2026-01-22 14:28 ` Andy Shevchenko
2026-01-22 10:56 ` [PATCH v2 net-next 02/15] net: mdio: add driver for NXP SJA1110 100BASE-T1 embedded PHYs Vladimir Oltean
2026-01-22 12:12 ` Andy Shevchenko
2026-01-22 12:47 ` Vladimir Oltean
2026-01-22 14:44 ` Andy Shevchenko [this message]
2026-01-22 22:10 ` Vladimir Oltean
2026-01-22 23:11 ` Andrew Lunn
2026-01-23 7:25 ` Andy Shevchenko
2026-01-22 10:56 ` [PATCH v2 net-next 03/15] net: mdio: add generic driver for NXP SJA1110 100BASE-TX " Vladimir Oltean
2026-01-22 12:20 ` Andy Shevchenko
2026-01-22 13:31 ` Vladimir Oltean
2026-01-22 14:48 ` Andy Shevchenko
2026-01-22 10:56 ` [PATCH v2 net-next 04/15] net: dsa: sja1105: prepare regmap for passing to child devices Vladimir Oltean
2026-01-22 12:23 ` Andy Shevchenko
2026-01-22 13:42 ` Vladimir Oltean
2026-01-22 14:54 ` Andy Shevchenko
2026-01-22 16:17 ` Russell King (Oracle)
2026-01-22 16:34 ` Andy Shevchenko
2026-01-22 10:56 ` [PATCH v2 net-next 05/15] net: dsa: sja1105: include spi.h from sja1105.h Vladimir Oltean
2026-01-22 10:56 ` [PATCH v2 net-next 06/15] net: dsa: sja1105: transition OF-based MDIO controllers to standalone sub-devices Vladimir Oltean
2026-01-22 10:56 ` [PATCH v2 net-next 07/15] net: pcs: xpcs: introduce xpcs_create_pcs_fwnode() Vladimir Oltean
2026-01-22 10:56 ` [PATCH v2 net-next 08/15] net: pcs: xpcs-plat: convert to regmap Vladimir Oltean
2026-01-22 10:56 ` [PATCH v2 net-next 09/15] dt-bindings: net: dsa: sja1105: document the PCS nodes Vladimir Oltean
2026-01-29 18:10 ` Rob Herring (Arm)
2026-01-22 10:56 ` [PATCH v2 net-next 10/15] net: pcs: xpcs-plat: add NXP SJA1105/SJA1110 support Vladimir Oltean
2026-01-22 10:56 ` [PATCH v2 net-next 11/15] net: dsa: sja1105: fill device tree with ethernet-pcs sub-devices under "regs" node Vladimir Oltean
2026-01-23 19:45 ` kernel test robot
2026-01-22 10:56 ` [PATCH v2 net-next 12/15] net: dsa: sja1105: replace mdiobus-pcs with xpcs-plat driver Vladimir Oltean
2026-01-22 10:56 ` [PATCH v2 net-next 13/15] net: dsa: sja1105: permit finding the XPCS via pcs-handle Vladimir Oltean
2026-01-22 10:56 ` [PATCH v2 net-next 14/15] dt-bindings: net: xpcs: allow properties from phy-common-props.yaml Vladimir Oltean
2026-01-22 10:56 ` [PATCH v2 net-next 15/15] net: pcs: xpcs: allow generic polarity inversion Vladimir Oltean
-- strict thread matches above, loose matches on Subject: below --
2026-01-23 18:53 [PATCH v2 net-next 02/15] net: mdio: add driver for NXP SJA1110 100BASE-T1 embedded PHYs kernel test robot
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=aXI339TiHFaEAWXE@smile.fi.intel.com \
--to=andriy.shevchenko@linux.intel.com \
--cc=andrew@lunn.ch \
--cc=broonie@kernel.org \
--cc=conor+dt@kernel.org \
--cc=davem@davemloft.net \
--cc=devicetree@vger.kernel.org \
--cc=edumazet@google.com \
--cc=fancer.lancer@gmail.com \
--cc=herve.codina@bootlin.com \
--cc=hkallweit1@gmail.com \
--cc=jiawenwu@trustnetic.com \
--cc=krzk+dt@kernel.org \
--cc=kuba@kernel.org \
--cc=lee@kernel.org \
--cc=linux-kernel@vger.kernel.org \
--cc=linux@armlinux.org.uk \
--cc=maxime.chevallier@bootlin.com \
--cc=netdev@vger.kernel.org \
--cc=pabeni@redhat.com \
--cc=robh@kernel.org \
--cc=vladimir.oltean@nxp.com \
--cc=yong.liang.choong@linux.intel.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.