From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 7489AD25B7B for ; Wed, 28 Jan 2026 13:41:39 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id D393B10E119; Wed, 28 Jan 2026 13:41:38 +0000 (UTC) Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by gabe.freedesktop.org (Postfix) with ESMTP id 003DD10E119 for ; Wed, 28 Jan 2026 13:41:36 +0000 (UTC) Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 17FA91515 for ; Wed, 28 Jan 2026 05:41:30 -0800 (PST) Received: from [192.168.0.1] (usa-sjc-imap-foss1.foss.arm.com [10.121.207.14]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id 583393F73F for ; Wed, 28 Jan 2026 05:41:36 -0800 (PST) Date: Wed, 28 Jan 2026 13:39:56 +0000 From: Liviu Dudau To: Caterina Shablia Cc: David Airlie , Simona Vetter , Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , kernel@collabora.com, Boris Brezillon , Steven Price , dri-devel@lists.freedesktop.org, linux-kernel@vger.kernel.org Subject: Re: [PATCH v2] drm: add ARM interleaved 64k modifier Message-ID: References: <20260127110740.473562-1-caterina.shablia@collabora.com> MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Disposition: inline In-Reply-To: <20260127110740.473562-1-caterina.shablia@collabora.com> X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" On Tue, Jan 27, 2026 at 11:07:39AM +0000, Caterina Shablia wrote: > This modifier is primarily intended to be used by panvk to implement > sparse partially-resident images with better map and unmap > performance, and no worse access performance, compared to > implementing them in terms of U-interleaved. > > With this modifier, the plane is divided into 64k byte 1:1 or 2:1 > -sided tiles. The 64k tiles are laid out linearly. Each 64k tile > is divided into blocks of 16x16 texel blocks each, which themselves > are laid out linearly within a 64k tile. Then within each such > 16x16 block, texel blocks are laid out according to U order, > similar to 16X16_BLOCK_U_INTERLEAVED. > > Unlike 16X16_BLOCK_U_INTERLEAVED, the layout does not depend on > whether a format is compressed or not. > > The hardware features corresponding to this modifier are available > starting with v10 (second gen Valhall.) > > The corresponding panvk MR can be found at: > https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38986 > > Previous patch: > https://lists.freedesktop.org/archives/dri-devel/2026-January/546655.html > > Changes since v1: > > * Rewrite the description of the modifier to be hopefully unambiguous. > > Signed-off-by: Caterina Shablia Reviewed-by: Liviu Dudau Best regards, Liviu > --- > include/uapi/drm/drm_fourcc.h | 16 ++++++++++++++++ > 1 file changed, 16 insertions(+) > > diff --git a/include/uapi/drm/drm_fourcc.h b/include/uapi/drm/drm_fourcc.h > index e527b24bd824..452f901513ad 100644 > --- a/include/uapi/drm/drm_fourcc.h > +++ b/include/uapi/drm/drm_fourcc.h > @@ -1422,6 +1422,22 @@ drm_fourcc_canonicalize_nvidia_format_mod(__u64 modifier) > #define DRM_FORMAT_MOD_ARM_16X16_BLOCK_U_INTERLEAVED \ > DRM_FORMAT_MOD_ARM_CODE(DRM_FORMAT_MOD_ARM_TYPE_MISC, 1ULL) > > +/* > + * ARM 64k interleaved modifier > + * > + * This is used by ARM Mali v10+ GPUs. With this modifier, the plane is divided > + * into 64k byte 1:1 or 2:1 -sided tiles. The 64k tiles are laid out linearly. > + * Each 64k tile is divided into blocks of 16x16 texel blocks, which are > + * themselves laid out linearly within a 64k tile. Then within each 16x16 > + * block, texel blocks are laid out according to U order, similar to > + * 16X16_BLOCK_U_INTERLEAVED. > + * > + * Note that unlike 16X16_BLOCK_U_INTERLEAVED, the layout does not change > + * depending on whether a format is compressed or not. > + */ > +#define DRM_FORMAT_MOD_ARM_INTERLEAVED_64K \ > + DRM_FORMAT_MOD_ARM_CODE(DRM_FORMAT_MOD_ARM_TYPE_MISC, 2ULL) > + > /* > * Allwinner tiled modifier > * > > base-commit: f08f665f8cda9520d98ee24545d306a92f386616 > -- > 2.47.3 >