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From: Raag Jadav <raag.jadav@intel.com>
To: Riana Tauro <riana.tauro@intel.com>
Cc: intel-xe@lists.freedesktop.org, dri-devel@lists.freedesktop.org,
	aravind.iddamsetty@linux.intel.com, anshuman.gupta@intel.com,
	rodrigo.vivi@intel.com, joonas.lahtinen@linux.intel.com,
	simona.vetter@ffwll.ch, airlied@gmail.com, pratik.bari@intel.com,
	joshua.santosh.ranjan@intel.com, ashwin.kumar.kulkarni@intel.com,
	shubham.kumar@intel.com, ravi.kishore.koppuravuri@intel.com
Subject: Re: [PATCH v5 2/5] drm/xe/xe_drm_ras: Add support for XE DRM RAS
Date: Tue, 3 Feb 2026 18:58:03 +0100	[thread overview]
Message-ID: <aYI3K0dQ46h4LIGN@black.igk.intel.com> (raw)
In-Reply-To: <20260202064356.286243-9-riana.tauro@intel.com>

On Mon, Feb 02, 2026 at 12:13:58PM +0530, Riana Tauro wrote:
> Allocate correctable, uncorrectable nodes for every xe device

Punctuations.

> Each node contains error component, counters and respective
> query counter functions.

Try to utilize the full 75 characters space where possible.

> Add basic functionality to create and register drm nodes.
> Below operations can be performed using Generic netlink DRM RAS interface

Punctuations.

...

> +++ b/drivers/gpu/drm/xe/xe_drm_ras.c
> @@ -0,0 +1,184 @@
> +// SPDX-License-Identifier: MIT
> +/*
> + * Copyright © 2026 Intel Corporation
> + */
> +
> +#include <drm/drm_managed.h>
> +#include <drm/drm_print.h>
> +#include <drm/drm_ras.h>
> +#include <linux/bitmap.h>

Linux includes usually go first.

> +#include "xe_device_types.h"
> +#include "xe_drm_ras.h"
> +
> +static const char * const errors[] = DRM_XE_RAS_ERROR_COMPONENT_NAMES;

'error_component'?

> +static const char * const error_severity[] = DRM_XE_RAS_ERROR_SEVERITY_NAMES;

...

> +static struct xe_drm_ras_counter *allocate_and_copy_counters(struct xe_device *xe)
> +{
> +	struct xe_drm_ras_counter *counter;
> +	int i;
> +
> +	counter = drmm_kcalloc(&xe->drm, DRM_XE_RAS_ERR_COMP_MAX,
> +			       sizeof(*counter), GFP_KERNEL);

Can be one line.

> +	if (!counter)
> +		return ERR_PTR(-ENOMEM);
> +
> +	for (i = DRM_XE_RAS_ERR_COMP_CORE_COMPUTE; i < DRM_XE_RAS_ERR_COMP_MAX; i++) {
> +		if (!errors[i])
> +			continue;
> +
> +		counter[i].name = errors[i];
> +		atomic_set(&counter[i].counter, 0);

Do you need this?

> +	}
> +
> +	return counter;
> +}

...

> +int xe_drm_ras_allocate_nodes(struct xe_device *xe)
> +{
> +	struct xe_drm_ras *ras = &xe->ras;
> +	struct drm_ras_node *node;
> +	int err;
> +
> +	node = drmm_kcalloc(&xe->drm, DRM_XE_RAS_ERR_SEV_MAX, sizeof(*node),
> +			    GFP_KERNEL);

Can be one line.

> +	if (!node)
> +		return -ENOMEM;
> +
> +	ras->node = node;
> +
> +	err = register_nodes(xe);
> +	if (err) {
> +		drm_err(&xe->drm, "Failed to register DRM RAS node\n");
> +		return err;
> +	}
> +
> +	err = devm_add_action_or_reset(xe->drm.dev, xe_drm_ras_unregister_nodes, xe);
> +	if (err) {
> +		drm_err(&xe->drm, "Failed to add action for Xe DRM RAS\n");
> +		return err;
> +	}
> +
> +	return 0;
> +}

...

> +++ b/drivers/gpu/drm/xe/xe_drm_ras_types.h
> @@ -0,0 +1,40 @@
> +/* SPDX-License-Identifier: MIT */
> +/*
> + * Copyright © 2026 Intel Corporation
> + */
> +
> +#ifndef _XE_DRM_RAS_TYPES_H_
> +#define _XE_DRM_RAS_TYPES_H_
> +
> +#include <drm/xe_drm.h>
> +#include <linux/atomic.h>

Ditto for linux includes.

> +struct drm_ras_node;

Reviewed-by: Raag Jadav <raag.jadav@intel.com>

  reply	other threads:[~2026-02-03 17:58 UTC|newest]

Thread overview: 24+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-02-02  6:43 [PATCH v5 0/5] Introduce DRM_RAS using generic netlink for RAS Riana Tauro
2026-02-02  6:43 ` [PATCH v5 1/5] drm/ras: Introduce the DRM RAS infrastructure over generic netlink Riana Tauro
2026-02-02 10:08   ` kernel test robot
2026-02-02 22:52   ` kernel test robot
2026-02-02  6:43 ` [PATCH v5 2/5] drm/xe/xe_drm_ras: Add support for XE DRM RAS Riana Tauro
2026-02-03 17:58   ` Raag Jadav [this message]
2026-02-10  4:20     ` Riana Tauro
2026-02-02  6:43 ` [PATCH v5 3/5] drm/xe/xe_hw_error: Integrate DRM RAS with hardware error handling Riana Tauro
2026-02-05  8:30   ` Raag Jadav
2026-02-10  4:58     ` Riana Tauro
2026-02-10  4:59       ` Riana Tauro
2026-02-02  6:44 ` [PATCH v5 4/5] drm/xe/xe_hw_error: Add support for Core-Compute errors Riana Tauro
2026-02-05 15:30   ` Raag Jadav
2026-02-10  5:58     ` Riana Tauro
2026-02-10 11:45       ` Raag Jadav
2026-02-12  3:25         ` Riana Tauro
2026-02-02  6:44 ` [PATCH v5 5/5] drm/xe/xe_hw_error: Add support for PVC SoC errors Riana Tauro
2026-02-05 18:10   ` Raag Jadav
2026-02-10  6:32     ` Riana Tauro
2026-02-10 11:52       ` Raag Jadav
2026-02-02 16:15 ` ✗ CI.checkpatch: warning for Introduce DRM_RAS using generic netlink for RAS (rev5) Patchwork
2026-02-02 16:16 ` ✓ CI.KUnit: success " Patchwork
2026-02-02 16:31 ` ✗ CI.checksparse: warning " Patchwork
2026-02-02 16:51 ` ✓ Xe.CI.BAT: success " Patchwork

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