From: Peng Fan <peng.fan@oss.nxp.com>
To: alice.guo@oss.nxp.com
Cc: "NXP i.MX U-Boot Team" <uboot-imx@nxp.com>,
u-boot@lists.denx.de, "Stefano Babic" <sbabic@nabladev.com>,
"Fabio Estevam" <festevam@gmail.com>,
"Tom Rini" <trini@konsulko.com>, "Peng Fan" <peng.fan@nxp.com>,
"Ye Li" <ye.li@nxp.com>, "Jindong Yue" <jindong.yue@nxp.com>,
"Jacky Bai" <ping.bai@nxp.com>,
"Marek Vasut" <marek.vasut+renesas@mailbox.org>,
"Rasmus Villemoes" <ravi@prevas.dk>,
"Fedor Ross" <fedor.ross@ifm.com>,
"João Paulo Gonçalves" <joao.goncalves@toradex.com>,
"Patrice Chotard" <patrice.chotard@foss.st.com>,
"Valentin Caron" <valentin.caron@foss.st.com>,
"Vinh Nguyen" <vinh.nguyen.xz@renesas.com>,
"Sam Protsenko" <semen.protsenko@linaro.org>,
"Ranjani Vaidyanathan" <Ranjani.Vaidyanathan@nxp.com>,
"Ji Luo" <ji.luo@nxp.com>, "Frank Li" <Frank.Li@nxp.com>,
"Sumit Garg" <sumit.garg@oss.qualcomm.com>,
"Adam Ford" <aford173@gmail.com>,
"Frieder Schrempf" <frieder.schrempf@kontron.de>,
"David Zang" <davidzangcs@gmail.com>,
"Andrew Goodbody" <andrew.goodbody@linaro.org>,
"Sumit Garg" <sumit.garg@kernel.org>,
"Marek Vasut" <marex@nabladev.com>,
"Joseph Guo" <qijian.guo@nxp.com>,
"Tim Harvey" <tharvey@gateworks.com>,
"Alice Guo" <alice.guo@nxp.com>
Subject: Re: [PATCH v1 01/12] imx9: scmi: Get DDR size through SM SCMI API
Date: Fri, 6 Feb 2026 08:34:39 +0800 [thread overview]
Message-ID: <aYU3H4T7shROL+60@shlinux89> (raw)
In-Reply-To: <20260205-imx952-v1-1-2103d0222a0b@nxp.com>
On Thu, Feb 05, 2026 at 09:55:07PM +0800, alice.guo@oss.nxp.com wrote:
>From: Ye Li <ye.li@nxp.com>
>
>SM has implemented MISC protocol for get DDR info. Using this API, u-boot
>could get DDR size instead of static configs. This will facilitate the DDR
>ECC enabled case which has 1/8 DDR size reserved by ECC data. SM get DDR info
>API provides the reduced DDR size.
>To be compatible with old SM, if calling this API failed, will fall back
>to static configs.
>
>Signed-off-by: Ye Li <ye.li@nxp.com>
>Signed-off-by: Alice Guo <alice.guo@nxp.com>
>---
> arch/arm/include/asm/mach-imx/sys_proto.h | 10 ++++
> arch/arm/mach-imx/imx9/scmi/soc.c | 76 +++++++++++++++++++++++++------
> include/scmi_protocols.h | 3 +-
> 3 files changed, 74 insertions(+), 15 deletions(-)
>
>diff --git a/arch/arm/include/asm/mach-imx/sys_proto.h b/arch/arm/include/asm/mach-imx/sys_proto.h
>index 46da7a1eff5..6c8bd6c9085 100644
>--- a/arch/arm/include/asm/mach-imx/sys_proto.h
>+++ b/arch/arm/include/asm/mach-imx/sys_proto.h
>@@ -254,6 +254,16 @@ struct scmi_rom_passover_get_out {
> u32 passover[(sizeof(rom_passover_t) + 8) / 4];
> };
>
>+struct scmi_ddr_info_out {
>+ s32 status;
>+ u32 attributes;
>+ u32 mts;
>+ u32 startlow;
>+ u32 starthigh;
>+ u32 endlow;
>+ u32 endhigh;
>+};
Add comment to explain the fields of the structure.
>+
> #endif
>
> /* For i.MX ULP */
>diff --git a/arch/arm/mach-imx/imx9/scmi/soc.c b/arch/arm/mach-imx/imx9/scmi/soc.c
>index c1458ccca3c..e573736825c 100644
>--- a/arch/arm/mach-imx/imx9/scmi/soc.c
>+++ b/arch/arm/mach-imx/imx9/scmi/soc.c
>@@ -58,6 +58,35 @@ uint32_t scmi_get_rom_data(rom_passover_t *rom_data)
> return 0;
> }
>
>+int scmi_misc_ddrinfo(u32 ddrc_id, struct scmi_ddr_info_out *out)
>+{
>+ u32 in = ddrc_id;
>+ struct scmi_msg msg = {
>+ .protocol_id = SCMI_PROTOCOL_ID_IMX_MISC,
>+ .message_id = SCMI_MISC_DDR_INFO_GET,
>+ .in_msg = (u8 *)&in,
>+ .in_msg_sz = sizeof(in),
>+ .out_msg = (u8 *)out,
>+ .out_msg_sz = sizeof(*out),
>+ };
>+ int ret;
>+ struct udevice *dev;
>+
>+ memset(out, 0, sizeof(*out));
This could be done in caller by set an initialization value to 0.
>+ ret = uclass_get_device_by_name(UCLASS_CLK, "protocol@14", &dev);
>+ if (ret)
>+ return ret;
>+
>+ ret = devm_scmi_process_msg(dev, &msg);
>+ if (ret != 0 || out->status != 0) {
>+ printf("Failed to get ddr cfg, scmi_err = %d\n",
>+ out->status);
>+ return -EINVAL;
>+ }
>+
>+ return 0;
>+}
>+
> #if IS_ENABLED(CONFIG_ENV_IS_IN_MMC)
> __weak int board_mmc_get_env_dev(int devno)
> {
>@@ -335,25 +364,44 @@ void enable_caches(void)
>
> __weak int board_phys_sdram_size(phys_size_t *size)
> {
>+ struct scmi_ddr_info_out ddr_info;
Init with "= { 0 }"
>+ int ret;
>+ u32 ddrc_id = 0, ddrc_num = 1;
> phys_size_t start, end;
>- phys_size_t val;
>
> if (!size)
> return -EINVAL;
>
>- val = readl(REG_DDR_CS0_BNDS);
>- start = (val >> 16) << 24;
>- end = (val & 0xFFFF);
>- end = end ? end + 1 : 0;
>- end = end << 24;
>- *size = end - start;
>-
>- val = readl(REG_DDR_CS1_BNDS);
>- start = (val >> 16) << 24;
>- end = (val & 0xFFFF);
>- end = end ? end + 1 : 0;
>- end = end << 24;
>- *size += end - start;
>+ *size = 0;
>+ do {
>+ ret = scmi_misc_ddrinfo(ddrc_id++, &ddr_info);
>+ if (ret) {
>+ /* if get DDR info failed, fall to default config */
>+ *size = PHYS_SDRAM_SIZE;
>+#ifdef PHYS_SDRAM_2_SIZE
>+ *size += PHYS_SDRAM_2_SIZE;
>+#endif
You dropped the method of directly reading REG_DDR_CS[0,1]_BNDS but switch
to using PHYS_SDRAM[x]_SIZE, and commit log does not mention it.
>+ return 0;
>+ } else {
>+ ddrc_num = ((ddr_info.attributes >> 16) & 0x3);
>+ start = ddr_info.starthigh;
>+ start <<= 32;
>+ start += ddr_info.startlow;
>+
>+ end = ddr_info.endhigh;
>+ end <<= 32;
>+ end += ddr_info.endlow;
>+
>+ *size += end + 1 - start;
>+
>+ debug("ddr info attr 0x%x, start 0x%x 0x%x, end 0x%x 0x%x, mts %u\n",
>+ ddr_info.attributes, ddr_info.starthigh, ddr_info.startlow,
>+ ddr_info.endhigh, ddr_info.endlow, ddr_info.mts);
>+ }
>+ } while (ddrc_id < ddrc_num);
>+
>+ /* SM reports total DDR size, need remove secure memory */
>+ *size -= PHYS_SDRAM - 0x80000000;
secure memory size is 2GB? Need to mention in commit log or at the place
of struct scmi_ddr_info_out definition about this behavior.
Regards
Peng
next prev parent reply other threads:[~2026-02-06 0:33 UTC|newest]
Thread overview: 33+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-02-05 13:55 [PATCH 00/12] imx: add i.MX952 support alice.guo
2026-02-05 13:55 ` [PATCH v1 01/12] imx9: scmi: Get DDR size through SM SCMI API alice.guo
2026-02-06 0:34 ` Peng Fan [this message]
2026-02-05 13:55 ` [PATCH v1 02/12] imx95/imx94: Remove board_phys_sdram_size from each board alice.guo
2026-02-06 0:35 ` Peng Fan
2026-02-05 13:55 ` [PATCH v1 03/12] pinctrl: nxp: Add i.MX952 support alice.guo
2026-02-06 0:36 ` Peng Fan
2026-02-05 13:55 ` [PATCH v1 04/12] arm: imx: Add i.MX952 CPU type support alice.guo
2026-02-06 0:37 ` Peng Fan
2026-02-05 13:55 ` [PATCH v1 05/12] imx: ele_ahab: Add i.MX952 support to display_life_cycle() alice.guo
2026-02-06 0:38 ` Peng Fan
2026-02-05 13:55 ` [PATCH v1 06/12] imx: container: Add i.MX952 support to get_imageset_end() alice.guo
2026-02-06 0:40 ` Peng Fan
2026-02-05 13:55 ` [PATCH v1 07/12] arm: imx952: Add watchdog base address definitions alice.guo
2026-02-06 0:41 ` Peng Fan
2026-02-06 3:59 ` Fabio Estevam
2026-02-09 10:24 ` 回复: " Alice Guo (OSS)
2026-02-09 11:21 ` Fabio Estevam
2026-02-05 13:55 ` [PATCH v1 08/12] arm: imx9: Add i.MX952 SoC support alice.guo
2026-02-06 0:45 ` Peng Fan
2026-02-22 1:34 ` David Zang
2026-02-05 13:55 ` [PATCH v1 09/12] cpu: imx952: Add i.MX952 support alice.guo
2026-02-06 0:46 ` Peng Fan
2026-02-05 13:55 ` [PATCH v1 10/12] dts: upstream: arm64: freescale: Sync i.MX952 device tree from Linux alice.guo
2026-02-05 15:38 ` Tom Rini
2026-02-09 10:34 ` 回复: " Alice Guo (OSS)
2026-02-09 14:03 ` Tom Rini
2026-02-05 13:55 ` [PATCH v1 11/12] arm: dts: Add U-Boot device tree for i.MX952 EVK alice.guo
2026-02-06 0:51 ` Peng Fan
2026-02-06 1:27 ` Tom Rini
2026-02-05 13:55 ` [PATCH v1 12/12] board: nxp: imx952_evk: Add i.MX952 15x15 lpddr4x board support alice.guo
2026-02-05 15:45 ` Tom Rini
2026-02-06 1:24 ` Peng Fan
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