From: Stafford Horne <shorne@gmail.com>
To: Richard Henderson <richard.henderson@linaro.org>
Cc: qemu-devel@nongnu.org, pierrick.bouvier@linaro.org
Subject: Re: [PATCH 2/6] include/hw/or1k: Rename from openrisc
Date: Fri, 6 Feb 2026 11:15:46 +0000 [thread overview]
Message-ID: <aYXNYtGl6fVk3_7a@antec> (raw)
In-Reply-To: <20260205030244.266447-3-richard.henderson@linaro.org>
Hi Richard,
On Thu, Feb 05, 2026 at 01:02:40PM +1000, Richard Henderson wrote:
> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
This looks fine to me.
Acked-by: Stafford Horne <shorne@gmail.com>
> ---
> include/hw/{openrisc => or1k}/boot.h | 6 +++---
> hw/openrisc/boot.c | 2 +-
> hw/openrisc/openrisc_sim.c | 2 +-
> hw/openrisc/virt.c | 2 +-
> MAINTAINERS | 2 +-
> 5 files changed, 7 insertions(+), 7 deletions(-)
> rename include/hw/{openrisc => or1k}/boot.h (93%)
>
> diff --git a/include/hw/openrisc/boot.h b/include/hw/or1k/boot.h
> similarity index 93%
> rename from include/hw/openrisc/boot.h
> rename to include/hw/or1k/boot.h
> index 3c481bdea6..2e6131580c 100644
> --- a/include/hw/openrisc/boot.h
> +++ b/include/hw/or1k/boot.h
> @@ -16,8 +16,8 @@
> * this program. If not, see <http://www.gnu.org/licenses/>.
> */
>
> -#ifndef OPENRISC_BOOT_H
> -#define OPENRISC_BOOT_H
> +#ifndef OR1K_BOOT_H
> +#define OR1K_BOOT_H
>
> #include "exec/cpu-defs.h"
> #include "hw/core/boards.h"
> @@ -32,4 +32,4 @@ hwaddr openrisc_load_initrd(void *fdt, const char *filename,
> uint32_t openrisc_load_fdt(MachineState *ms, void *fdt, hwaddr load_start,
> uint64_t mem_size);
>
> -#endif /* OPENRISC_BOOT_H */
> +#endif /* OR1K_BOOT_H */
> diff --git a/hw/openrisc/boot.c b/hw/openrisc/boot.c
> index 6256babc42..c18f4a6a9f 100644
> --- a/hw/openrisc/boot.c
> +++ b/hw/openrisc/boot.c
> @@ -12,7 +12,7 @@
> #include "exec/target_page.h"
> #include "elf.h"
> #include "hw/core/loader.h"
> -#include "hw/openrisc/boot.h"
> +#include "hw/or1k/boot.h"
> #include "system/device_tree.h"
> #include "system/qtest.h"
> #include "system/reset.h"
> diff --git a/hw/openrisc/openrisc_sim.c b/hw/openrisc/openrisc_sim.c
> index 603d8ca0d9..f1b1f63274 100644
> --- a/hw/openrisc/openrisc_sim.c
> +++ b/hw/openrisc/openrisc_sim.c
> @@ -26,7 +26,7 @@
> #include "hw/core/boards.h"
> #include "hw/char/serial-mm.h"
> #include "net/net.h"
> -#include "hw/openrisc/boot.h"
> +#include "hw/or1k/boot.h"
> #include "hw/core/qdev-properties.h"
> #include "system/address-spaces.h"
> #include "system/device_tree.h"
> diff --git a/hw/openrisc/virt.c b/hw/openrisc/virt.c
> index 54ce96666e..39f54058ab 100644
> --- a/hw/openrisc/virt.c
> +++ b/hw/openrisc/virt.c
> @@ -16,7 +16,7 @@
> #include "hw/core/boards.h"
> #include "hw/char/serial-mm.h"
> #include "hw/core/split-irq.h"
> -#include "hw/openrisc/boot.h"
> +#include "hw/or1k/boot.h"
> #include "hw/misc/sifive_test.h"
> #include "hw/pci/pci.h"
> #include "hw/pci-host/gpex.h"
> diff --git a/MAINTAINERS b/MAINTAINERS
> index a0422936ad..508d37ab7a 100644
> --- a/MAINTAINERS
> +++ b/MAINTAINERS
> @@ -305,7 +305,7 @@ S: Odd Fixes
> F: docs/system/openrisc/cpu-features.rst
> F: target/or1k/
> F: hw/openrisc/
> -F: include/hw/openrisc/
> +F: include/hw/or1k/
> F: tests/functional/or1k/meson.build
> F: tests/tcg/openrisc/
>
> --
> 2.43.0
>
next prev parent reply other threads:[~2026-02-06 11:16 UTC|newest]
Thread overview: 17+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-02-05 3:02 [PATCH 0/6] or1k: Rename the architecture from openrisc Richard Henderson
2026-02-05 3:02 ` [PATCH 1/6] target/or1k: Rename " Richard Henderson
2026-02-05 15:46 ` Philippe Mathieu-Daudé
2026-02-05 3:02 ` [PATCH 2/6] include/hw/or1k: " Richard Henderson
2026-02-06 11:15 ` Stafford Horne [this message]
2026-02-05 3:02 ` [PATCH 3/6] hw/or1k: " Richard Henderson
2026-02-05 15:43 ` Philippe Mathieu-Daudé
2026-02-05 3:02 ` [PATCH 4/6] tests/tcg/or1k: " Richard Henderson
2026-02-06 11:16 ` Stafford Horne
2026-02-05 3:02 ` [PATCH 5/6] docs/system/or1k: " Richard Henderson
2026-02-06 11:18 ` Stafford Horne
2026-02-05 3:02 ` [PATCH 6/6] hw/or1k: Rename or1k-sim.c from openrisc_sim.c Richard Henderson
2026-02-06 11:19 ` Stafford Horne
2026-02-05 5:23 ` [PATCH 0/6] or1k: Rename the architecture from openrisc Pierrick Bouvier
2026-02-05 15:39 ` Philippe Mathieu-Daudé
2026-02-05 15:47 ` Philippe Mathieu-Daudé
2026-02-06 21:37 ` Philippe Mathieu-Daudé
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