From: Sean Christopherson <seanjc@google.com>
To: Zhiquan Li <zhiquan_li@163.com>
Cc: pbonzini@redhat.com, shuah@kernel.org, kvm@vger.kernel.org,
linux-kernel@vger.kernel.org
Subject: Re: [PATCH RESEND 5/5] KVM: x86: selftests: Fix write MSR_TSC_AUX reserved bits test failure on Hygon
Date: Tue, 10 Feb 2026 12:02:51 -0800 [thread overview]
Message-ID: <aYuO673vMcZ-DJ7m@google.com> (raw)
In-Reply-To: <65765e72-fce0-48ed-ab95-af2736a562cd@163.com>
On Tue, Feb 10, 2026, Zhiquan Li wrote:
>
> On 2/10/26 00:41, Sean Christopherson wrote:
> > On Mon, Feb 09, 2026, Zhiquan Li wrote:
> >> Therefore, the expectation of writing MSR_TSC_AUX reserved bits on Hygon
> >> CPUs should be:
> >> 1) either RDTSCP or RDPID is supported case, and both are supported
> >> case, expect success and a truncated value, not #GP.
> >> 2) neither RDTSCP nor RDPID is supported, expect #GP.
> >
> > That's how Intel and AMD behave as well. I don't understand why there needs to
> > be a big pile of special case code for Hygon. Presumably just fixup_rdmsr_val()
> > needs to be changed?
> >
>
> Currently the conditions cannot cover the case that the host *only* supports
> RDTSCP but not support RDPID, like Hygon CPU. Let me give more details for this
> test failure.
>
> When testing the case MSR_TEST2(MSR_TSC_AUX, 0x12345678, u64_val, RDPID,
> RDTSCP), the cupid bit for RDPID (as feature) of vCPU 0 and vCPU1 will be
> removed because host is not supported it, but please note RDTSCP (as feature2)
> is supported. Therefore, the preceding condition “!this_cpu_has(msr->feature)”
> here is true and then the test run into the first branch. Because the feature2
> RDTSCP is supported, writing reserved bits (that is, guest_test_reserved_val())
> will succeed, unfortunately, the expectation for the first branch is #GP.
>
> The check to fixup_rdmsr_val() is too late, since the preceding condition
> already leads to the test run into the wrong branch.
>
> The test can be passed on AMD CPU is because RDPID is usually supported by host,
> the cupid bit for RDPID of vCPU 0 and vCPU1 can be kept, then fixup_rdmsr_val()
> can drive it to the second branch. Theoretically, the failure also can be
> reproduced on some old AMD CPUs which only support RDTSCP, it’s hard to find
> such an old machine to confirm it, but I suppose this case can be covered by
> slight changes based on this patch.
>
> Intel CPU no such failure, because writing MSR_TSC_AUX reserved bits results in
> #GP is expected behavior.
Gah, I think I tested -rdpid and -rdtscp in a VM on Intel, but not AMD. I think
the fix is just this:
diff --git a/tools/testing/selftests/kvm/x86/msrs_test.c b/tools/testing/selftests/kvm/x86/msrs_test.c
index 40d918aedce6..ebd900e713c1 100644
--- a/tools/testing/selftests/kvm/x86/msrs_test.c
+++ b/tools/testing/selftests/kvm/x86/msrs_test.c
@@ -175,7 +175,7 @@ void guest_test_reserved_val(const struct kvm_msr *msr)
* If the CPU will truncate the written value (e.g. SYSENTER on AMD),
* expect success and a truncated value, not #GP.
*/
- if (!this_cpu_has(msr->feature) ||
+ if ((!this_cpu_has(msr->feature) && !this_cpu_has(msr->feature2)) ||
msr->rsvd_val == fixup_rdmsr_val(msr->index, msr->rsvd_val)) {
u8 vec = wrmsr_safe(msr->index, msr->rsvd_val);
next prev parent reply other threads:[~2026-02-10 20:02 UTC|newest]
Thread overview: 15+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-02-09 4:13 [PATCH RESEND 0/5] KVM: x86: selftests: Add Hygon CPUs support and fix failures Zhiquan Li
2026-02-09 4:13 ` [PATCH RESEND 1/5] KVM: x86: selftests: Add CPU vendor detection for Hygon Zhiquan Li
2026-02-09 4:13 ` [PATCH RESEND 2/5] KVM: x86: selftests: Alter the instruction of hypercall on Hygon Zhiquan Li
2026-02-09 16:37 ` Sean Christopherson
2026-02-10 9:04 ` Zhiquan Li
2026-02-09 4:13 ` [PATCH RESEND 3/5] KVM: x86: selftests: Avoid failures due to reserved memory address regions " Zhiquan Li
2026-02-09 4:13 ` [PATCH RESEND 4/5] KVM: x86: selftests: Allow the PMU event filter test for Hygon Zhiquan Li
2026-02-09 16:38 ` Sean Christopherson
2026-02-10 9:07 ` Zhiquan Li
2026-02-09 4:13 ` [PATCH RESEND 5/5] KVM: x86: selftests: Fix write MSR_TSC_AUX reserved bits test failure on Hygon Zhiquan Li
2026-02-09 16:41 ` Sean Christopherson
2026-02-10 10:17 ` Zhiquan Li
2026-02-10 20:02 ` Sean Christopherson [this message]
2026-02-11 9:24 ` Zhiquan Li
2026-02-11 16:26 ` Sean Christopherson
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