From: Richard Acayan <mailingradian@gmail.com>
To: Krzysztof Kozlowski <krzk@kernel.org>
Cc: Bjorn Andersson <andersson@kernel.org>,
Linus Walleij <linusw@kernel.org>, Rob Herring <robh@kernel.org>,
Krzysztof Kozlowski <krzk+dt@kernel.org>,
Conor Dooley <conor+dt@kernel.org>,
Konrad Dybcio <konradybcio@kernel.org>,
linux-arm-msm@vger.kernel.org, linux-gpio@vger.kernel.org,
devicetree@vger.kernel.org
Subject: Re: [PATCH 3/3] arm64: dts: qcom: sdm670: add lpi pinctrl
Date: Tue, 10 Feb 2026 19:23:36 -0500 [thread overview]
Message-ID: <aYvMCCWxVPXQeRCZ@rdacayan> (raw)
In-Reply-To: <2b3d9528-56d0-407f-bd3f-e805cfdea5e3@kernel.org>
On Tue, Feb 10, 2026 at 08:42:59AM +0100, Krzysztof Kozlowski wrote:
> On 10/02/2026 03:11, Richard Acayan wrote:
> > + lpi_tlmm: pinctrl@62b40000 {
> > + compatible = "qcom,sdm670-lpass-lpi-pinctrl";
> > + reg = <0 0x62b40000 0 0x20000>;
> > + gpio-controller;
> > + #gpio-cells = <2>;
> > + gpio-ranges = <&lpi_tlmm 0 0 32>;
> > + status = "disabled";
>
> Why is this disabled? We disable blocks needing external resources or
> being busses/connectors. This is not the case.
There are reserved GPIOs on the Pixel 3a. Since commit 4f0d22ec60ce
("pinctrl: lpass-lpi: implement .get_direction() for the GPIO driver"),
this can't be probed when the reserved GPIOs are unspecified.
next prev parent reply other threads:[~2026-02-11 0:23 UTC|newest]
Thread overview: 15+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-02-10 2:11 [PATCH 0/3] SDM670 LPASS LPI pin controller support Richard Acayan
2026-02-10 2:11 ` [PATCH 1/3] dt-bindings: pinctrl: qcom: Add SDM670 LPI pinctrl Richard Acayan
2026-02-10 7:41 ` Krzysztof Kozlowski
2026-02-11 2:02 ` Richard Acayan
2026-02-12 7:28 ` Krzysztof Kozlowski
2026-02-10 2:11 ` [PATCH 2/3] pinctrl: qcom: add sdm670 lpi tlmm Richard Acayan
2026-02-10 9:08 ` Konrad Dybcio
2026-02-11 0:35 ` Richard Acayan
2026-02-12 9:07 ` Konrad Dybcio
2026-02-10 2:11 ` [PATCH 3/3] arm64: dts: qcom: sdm670: add lpi pinctrl Richard Acayan
2026-02-10 7:42 ` Krzysztof Kozlowski
2026-02-11 0:23 ` Richard Acayan [this message]
2026-02-12 9:08 ` Konrad Dybcio
2026-03-04 23:52 ` Richard Acayan
2026-02-23 10:14 ` [PATCH 0/3] SDM670 LPASS LPI pin controller support Linus Walleij
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=aYvMCCWxVPXQeRCZ@rdacayan \
--to=mailingradian@gmail.com \
--cc=andersson@kernel.org \
--cc=conor+dt@kernel.org \
--cc=devicetree@vger.kernel.org \
--cc=konradybcio@kernel.org \
--cc=krzk+dt@kernel.org \
--cc=krzk@kernel.org \
--cc=linusw@kernel.org \
--cc=linux-arm-msm@vger.kernel.org \
--cc=linux-gpio@vger.kernel.org \
--cc=robh@kernel.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.