From: Max Chou <max.chou@sifive.com>
To: Richard Henderson <richard.henderson@linaro.org>
Cc: qemu-devel@nongnu.org
Subject: Re: [PATCH v4 8/9] fpu: Add conversion routines for OCP FP8 E4M3
Date: Mon, 16 Feb 2026 12:22:00 +0800 [thread overview]
Message-ID: <aZKVxean7S9fkHHn@sifive.com> (raw)
In-Reply-To: <20260205111622.461497-9-richard.henderson@linaro.org>
On 2026-02-05 21:16, Richard Henderson wrote:
> index 1e1bbb14fd..a45873c51f 100644
> --- a/fpu/softfloat-parts.c.inc
> +++ b/fpu/softfloat-parts.c.inc
> @@ -360,6 +384,12 @@ static void partsN(uncanon_normal)(FloatPartsN *p, float_status *s,
> }
> break;
>
> + case float_expmax_e4m3:
> + if (exp > exp_max || p->frac_hi > E4M3_NORMAL_FRAC_MAX) {
> + partsN(uncanon_e4m3_overflow)(p, s, fmt, overflow_norm);
We need to sync local exp here liked:
+ exp = exp_max;
> + }
> + break;
> +
> @@ -459,9 +489,18 @@ static void partsN(uncanon)(FloatPartsN *p, float_status *s,
> frac_clear(p);
> return;
> case float_class_inf:
> - assert(fmt->exp_max_kind == float_expmax_ieee);
> - p->exp = fmt->exp_max;
> - frac_clear(p);
> + switch (fmt->exp_max_kind) {
> + case float_expmax_ieee:
> + p->exp = fmt->exp_max;
> + frac_clear(p);
> + break;
Thanks for Chao's notification. Here I missed the saturate checking at v3.
We need following checking flow for E5M2 when when float_expmax_ieee.
+ if (saturate) {
+ p->exp = fmt->exp_max - 1;
+ frac_allones(p);
+ } else {
+ p->exp = fmt->exp_max;
+ frac_clear(p);
+ }
> + case float_expmax_e4m3:
> + partsN(uncanon_e4m3_overflow)(p, s, fmt, saturate);
And we need to shift frac to packed format liked:
+ frac_shr(p, fmt->frac_shift);
> + break;
> + case float_expmax_normal:
> + default:
> + g_assert_not_reached();
> + }
Thank you Richard for this v4 patchset.
I can pass Chao's test and other test with the fix modifications
suggested here.
Could you please let me know if you’re okay with the softfloat OCP FP
conversion v4 patchset containing the OCP FP classification functions?
(e.g. float8_[e4m3|e5m2]_is_[zero|normal|signaling_nan|quiet_nan], etc.)
If not, I could provide another patchset for these OCP FP classification
funtions.
Thanks,
rnax
next prev parent reply other threads:[~2026-02-16 4:22 UTC|newest]
Thread overview: 16+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-02-05 11:16 [PATCH v4 0/9] fpu: Add conversion routines for OCP FP{4,8} Richard Henderson
2026-02-05 11:16 ` [PATCH v4 1/9] fpu/softfloat: Refactor IEEE format NaN classification to share code Richard Henderson
2026-02-05 11:16 ` [PATCH v4 2/9] fpu/softfloat: Refactor floatx80 " Richard Henderson
2026-02-05 11:16 ` [PATCH v4 3/9] target/i386: Fix pseudo-NaN handling in FPATAN/FYL2XP1/FYL2X helpers Richard Henderson
2026-02-05 11:16 ` [PATCH v4 4/9] fpu: Introduce FloatFmtExpMaxKind Richard Henderson
2026-02-05 11:16 ` [PATCH v4 5/9] fpu: Add overflow_raises_invalid to FloatFmt Richard Henderson
2026-02-05 11:16 ` [PATCH v4 6/9] fpu: Add saturate parameter to parts_uncanon Richard Henderson
2026-02-05 11:16 ` [PATCH v4 7/9] fpu: Add conversion routines for OCP FP8 E5M2 Richard Henderson
2026-02-05 11:16 ` [PATCH v4 8/9] fpu: Add conversion routines for OCP FP8 E4M3 Richard Henderson
2026-02-16 4:22 ` Max Chou [this message]
2026-02-16 5:04 ` Richard Henderson
2026-02-20 4:39 ` Max Chou
2026-02-16 5:30 ` Richard Henderson
2026-02-20 5:44 ` Max Chou
2026-02-20 6:33 ` Chao Liu
2026-02-05 11:16 ` [PATCH v4 9/9] fpu: Add conversion routines for OCP FP4 E2M1 Richard Henderson
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