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From: Max Chou <max.chou@sifive.com>
To: Richard Henderson <richard.henderson@linaro.org>
Cc: qemu-devel@nongnu.org
Subject: Re: [PATCH v4 8/9] fpu: Add conversion routines for OCP FP8 E4M3
Date: Fri, 20 Feb 2026 13:44:27 +0800	[thread overview]
Message-ID: <aZfli2koayS41FRS@sifive.com> (raw)
In-Reply-To: <695ae1da-8ca6-4966-87fa-5cd712cda59a@linaro.org>

On 2026-02-16 15:30, Richard Henderson wrote:
> It doesn't feel right doing this here, because true overflow is handled
> elsewhere.  This is re-packing a FloatParts for a given FloatFmt.
> 
> Perhaps parts64_float_to_float() would be the proper place for this, as
> that's the conversion operation, and recognizing this overflow feels like
> part of a conversion.

Hmm, I agree with you. Maybe we could add a new float_to_e5m2 similar to
float_to_ahp and replacing the parts_float_to_float calls in
float32_to_float8_e5m2/bfloat16_to_float8_e5m2.

+static void parts_float_to_e5m2(FloatParts64 *a, float_status *s,
+                                bool saturate)
+{
+    switch (a->cls) {
+    case float_class_snan:
+    case float_class_qnan:
+        parts_return_nan(a, s);
+        break;
+    case float_class_inf:
+        if (saturate) {
+            float_raise(float_flag_invalid, s);
+            a->cls = float_class_normal;
+            a->exp = float8_e5m2_params.exp_max - 1;
+            a->frac = MAKE_64BIT_MASK(float8_e5m2_params.frac_shift,
+                                      float8_e5m2_params.frac_size + 1);
+        }
+        break;
+    case float_class_denormal:
+        float_raise(float_flag_input_denormal_used, s);
+        break;
+    case float_class_normal:
+    case float_class_zero:
+        break;
+    default:
+        g_assert_not_reached();
+    }
+}

Thanks for the feedbacks,
rnax


  reply	other threads:[~2026-02-20  5:45 UTC|newest]

Thread overview: 16+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-02-05 11:16 [PATCH v4 0/9] fpu: Add conversion routines for OCP FP{4,8} Richard Henderson
2026-02-05 11:16 ` [PATCH v4 1/9] fpu/softfloat: Refactor IEEE format NaN classification to share code Richard Henderson
2026-02-05 11:16 ` [PATCH v4 2/9] fpu/softfloat: Refactor floatx80 " Richard Henderson
2026-02-05 11:16 ` [PATCH v4 3/9] target/i386: Fix pseudo-NaN handling in FPATAN/FYL2XP1/FYL2X helpers Richard Henderson
2026-02-05 11:16 ` [PATCH v4 4/9] fpu: Introduce FloatFmtExpMaxKind Richard Henderson
2026-02-05 11:16 ` [PATCH v4 5/9] fpu: Add overflow_raises_invalid to FloatFmt Richard Henderson
2026-02-05 11:16 ` [PATCH v4 6/9] fpu: Add saturate parameter to parts_uncanon Richard Henderson
2026-02-05 11:16 ` [PATCH v4 7/9] fpu: Add conversion routines for OCP FP8 E5M2 Richard Henderson
2026-02-05 11:16 ` [PATCH v4 8/9] fpu: Add conversion routines for OCP FP8 E4M3 Richard Henderson
2026-02-16  4:22   ` Max Chou
2026-02-16  5:04     ` Richard Henderson
2026-02-20  4:39       ` Max Chou
2026-02-16  5:30     ` Richard Henderson
2026-02-20  5:44       ` Max Chou [this message]
2026-02-20  6:33         ` Chao Liu
2026-02-05 11:16 ` [PATCH v4 9/9] fpu: Add conversion routines for OCP FP4 E2M1 Richard Henderson

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