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[104.155.56.206]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-483bd750607sm396115035e9.10.2026.03.02.02.10.43 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 02 Mar 2026 02:10:44 -0800 (PST) Date: Mon, 2 Mar 2026 10:10:40 +0000 From: Mostafa Saleh To: Tao Tang Cc: Eric Auger , Peter Maydell , "Michael S . Tsirkin" , Marcel Apfelbaum , qemu-devel@nongnu.org, qemu-arm@nongnu.org, Chen Baozi , Pierrick Bouvier , Philippe =?iso-8859-1?Q?Mathieu-Daud=E9?= , Chao Liu Subject: Re: [RFC v4 19/31] hw/arm/smmuv3: Fix CFGI_CD handling when stage-1 is unsupported Message-ID: References: <20260221100250.2976287-1-tangtao1634@phytium.com.cn> <20260221101733.2995020-1-tangtao1634@phytium.com.cn> <585be3ce-d5f3-455a-a7fb-3181920cfc60@phytium.com.cn> MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Disposition: inline Content-Transfer-Encoding: 8bit In-Reply-To: <585be3ce-d5f3-455a-a7fb-3181920cfc60@phytium.com.cn> Received-SPF: pass client-ip=2a00:1450:4864:20::32e; envelope-from=smostafa@google.com; helo=mail-wm1-x32e.google.com X-Spam_score_int: -175 X-Spam_score: -17.6 X-Spam_bar: ----------------- X-Spam_report: (-17.6 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_MED=-0.001, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, ENV_AND_HDR_SPF_MATCH=-0.5, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, USER_IN_DEF_DKIM_WL=-7.5, USER_IN_DEF_SPF_WL=-7.5 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-arm@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-arm-bounces+qemu-arm=archiver.kernel.org@nongnu.org Sender: qemu-arm-bounces+qemu-arm=archiver.kernel.org@nongnu.org On Sun, Mar 01, 2026 at 08:33:15PM +0800, Tao Tang wrote: > Hi Mostafa, > > On 2026/2/27 PM10:49, Mostafa Saleh wrote: > > On Sat, Feb 21, 2026 at 06:17:33PM +0800, Tao Tang wrote: > > > Add a STAGE1_SUPPORTED check in the CMD_CFGI_CD and CMD_CFGI_CD_ALL path > > > and return CERROR_ILL when stage-1 translation is not implemented, > > > matching the architecture requirement (IHI 0070G.b, page 176). > > > > > > Fixes: 32cfd7f39e08 ("hw/arm/smmuv3: Cache/invalidate config data") > > > Signed-off-by: Tao Tang > > This is a separate fix, it can be sent standalone to make this series > > smaller, similarly the first patch. > > > For #1, #2 and #19 commit (this one), since I’m not fully sure about the > expected process here, should I resend these already Reviewed-by fixes as > standalone patch respectively right now,  and try to get them merged first? > Yes, that's my own opinion, that would make this series smaller and slightly easier to review, but it's up to Eric. Thanks, Mostafa > > > Also the "Fixes" comment is not accurate, that was probably broken from > > the stage-2 implementation which was added later. > > > I'll remove "Fixes" when resending this commit. > > > > Reviewed-by: Mostafa Saleh > > > > Thanks, > > Mostafa > > > Thanks for your review. > > Tao > >