From: "Dr. David Alan Gilbert" <dave@treblig.org>
To: "Philippe Mathieu-Daudé" <philmd@linaro.org>
Cc: qemu-devel@nongnu.org
Subject: Re: [PULL 02/16] target/alpha: Use explicit little-endian LD/ST API
Date: Wed, 4 Mar 2026 11:47:09 +0000 [thread overview]
Message-ID: <aagbvX7zC_aj3Spr@gallifrey> (raw)
In-Reply-To: <dae98d2b-6e0a-42bc-bfdf-5c33e74cd390@linaro.org>
* Philippe Mathieu-Daudé (philmd@linaro.org) wrote:
> On 1/3/26 15:51, Dr. David Alan Gilbert wrote:
> > * Philippe Mathieu-Daudé (philmd@linaro.org) wrote:
> > > The Alpha architecture uses little endianness. Directly
> >
> > Wasn't there one, odd case of the T3E running it big-endian?
> > (I have no idea how that worked in practice).
>
> Richard said it was not necessary to mention it in the code:
> https://lore.kernel.org/qemu-devel/20260106155755.53646-7-philmd@linaro.org/
> https://lore.kernel.org/qemu-devel/75b13774-93f3-45db-bc1a-5b8687fcb3b9@linaro.org/
>
> I could have mentioned it here in the commit description
> for clarity but didn't think about it...
Ah right, didn't spot that review.
Thanks for the reply,
Dave
> >
> > Dave
> >
> > > use the little-endian LD/ST API.
> > >
> > > Mechanical change running:
> > >
> > > $ for a in uw w l q; do \
> > > sed -i -e "s/ld${a}_p(/ld${a}_le_p(/" \
> > > $(git grep -wlE '(ld|st)u?[wlq]_p' target/alpha/);
> > > done
> > >
> > > Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
> > > Reviewed-by: Manos Pitsidianakis <manos.pitsidianakis@linaro.org>
> > > Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
> > > Message-Id: <20251224160040.88612-2-philmd@linaro.org>
> > > ---
> > > target/alpha/helper.c | 11 ++++++-----
> > > 1 file changed, 6 insertions(+), 5 deletions(-)
> > >
> > > diff --git a/target/alpha/helper.c b/target/alpha/helper.c
> > > index a9af52a928f..80542cb0665 100644
> > > --- a/target/alpha/helper.c
> > > +++ b/target/alpha/helper.c
> > > @@ -214,17 +214,18 @@ static int get_physical_address(CPUAlphaState *env, target_ulong addr,
> > > pt = env->ptbr;
> > > - /* TODO: rather than using ldq_phys() to read the page table we should
> > > + /*
> > > + * TODO: rather than using ldq_phys_le() to read the page table we should
> > > * use address_space_ldq() so that we can handle the case when
> > > * the page table read gives a bus fault, rather than ignoring it.
> > > - * For the existing code the zero data that ldq_phys will return for
> > > + * For the existing code the zero data that ldq_phys_le will return for
> > > * an access to invalid memory will result in our treating the page
> > > * table as invalid, which may even be the right behaviour.
> > > */
> > > /* L1 page table read. */
> > > index = (addr >> (TARGET_PAGE_BITS + 20)) & 0x3ff;
> > > - L1pte = ldq_phys(cs->as, pt + index*8);
> > > + L1pte = ldq_phys_le(cs->as, pt + index * 8);
> > > if (unlikely((L1pte & PTE_VALID) == 0)) {
> > > ret = MM_K_TNV;
> > > @@ -237,7 +238,7 @@ static int get_physical_address(CPUAlphaState *env, target_ulong addr,
> > > /* L2 page table read. */
> > > index = (addr >> (TARGET_PAGE_BITS + 10)) & 0x3ff;
> > > - L2pte = ldq_phys(cs->as, pt + index*8);
> > > + L2pte = ldq_phys_le(cs->as, pt + index * 8);
> > > if (unlikely((L2pte & PTE_VALID) == 0)) {
> > > ret = MM_K_TNV;
> > > @@ -250,7 +251,7 @@ static int get_physical_address(CPUAlphaState *env, target_ulong addr,
> > > /* L3 page table read. */
> > > index = (addr >> TARGET_PAGE_BITS) & 0x3ff;
> > > - L3pte = ldq_phys(cs->as, pt + index*8);
> > > + L3pte = ldq_phys_le(cs->as, pt + index * 8);
> > > phys = L3pte >> 32 << TARGET_PAGE_BITS;
> > > if (unlikely((L3pte & PTE_VALID) == 0)) {
> > > --
> > > 2.52.0
> > >
> > >
>
--
-----Open up your eyes, open up your mind, open up your code -------
/ Dr. David Alan Gilbert | Running GNU/Linux | Happy \
\ dave @ treblig.org | | In Hex /
\ _________________________|_____ http://www.treblig.org |_______/
next prev parent reply other threads:[~2026-03-04 11:47 UTC|newest]
Thread overview: 22+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-02-02 21:20 [PULL 00/16] Misc HW & Memory API patches for 2026-02-02 Philippe Mathieu-Daudé
2026-02-02 21:20 ` [PULL 01/16] tests/unit: add unit test for qemu_hexdump() Philippe Mathieu-Daudé
2026-02-02 21:20 ` [PULL 02/16] target/alpha: Use explicit little-endian LD/ST API Philippe Mathieu-Daudé
2026-03-01 14:51 ` Dr. David Alan Gilbert
2026-03-04 6:31 ` Philippe Mathieu-Daudé
2026-03-04 11:47 ` Dr. David Alan Gilbert [this message]
2026-02-02 21:20 ` [PULL 03/16] target/alpha: Inline translator_ldl() Philippe Mathieu-Daudé
2026-02-02 21:20 ` [PULL 04/16] configs/targets: Forbid Alpha to use legacy native endianness APIs Philippe Mathieu-Daudé
2026-02-02 21:20 ` [PULL 05/16] target/alpha: Replace legacy ld_phys() -> address_space_ld() Philippe Mathieu-Daudé
2026-02-02 21:20 ` [PULL 06/16] memory: Remove memory_region_init_rom_device_nomigrate() Philippe Mathieu-Daudé
2026-02-02 21:20 ` [PULL 07/16] memory: Add internal memory_region_set_ops helper function Philippe Mathieu-Daudé
2026-02-02 21:20 ` [PULL 08/16] hw/nvme: Fix bootindex suffix use-after-free Philippe Mathieu-Daudé
2026-02-02 21:20 ` [PULL 09/16] hw/ide, scsi-disk: Fix typo on the rotation_rate documentation Philippe Mathieu-Daudé
2026-02-02 21:20 ` [PULL 10/16] accel/tcg: Send the CPUTLBEntryFull struct into io_prepare() Philippe Mathieu-Daudé
2026-02-02 21:20 ` [PULL 11/16] accel/tcg: Fix iotlb_to_section() for different AddressSpace Philippe Mathieu-Daudé
2026-02-02 21:20 ` [PULL 12/16] system/physmem: Remove the assertion of page-aligned section number Philippe Mathieu-Daudé
2026-02-02 21:20 ` [PULL 13/16] target/i386: Include missing 'svm.h' header in 'sev.h' Philippe Mathieu-Daudé
2026-02-02 21:20 ` [PULL 14/16] monitor: Reduce target-specific declarations Philippe Mathieu-Daudé
2026-02-02 21:20 ` [PULL 15/16] monitor: Add hmp_cmds_for_target() helper Philippe Mathieu-Daudé
2026-02-02 21:20 ` [PULL 16/16] monitor: Reduce target-specific methods Philippe Mathieu-Daudé
2026-02-02 22:35 ` [PULL 00/16] Misc HW & Memory API patches for 2026-02-02 BALATON Zoltan
2026-02-03 1:11 ` Richard Henderson
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