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Date: Wed, 4 Mar 2026 17:36:16 +0100 From: Roger Pau =?utf-8?B?TW9ubsOp?= To: Jan Beulich Cc: "xen-devel@lists.xenproject.org" , Andrew Cooper , Jason Andryuk , Penny Zheng Subject: Re: [PATCH] x86/ACPI: _PDC bits vs HWP/CPPC Message-ID: References: Content-Type: text/plain; charset=utf-8 Content-Disposition: inline Content-Transfer-Encoding: 8bit In-Reply-To: X-ClientProxiedBy: MA3P292CA0069.ESPP292.PROD.OUTLOOK.COM (2603:10a6:250:49::9) To CH7PR03MB7860.namprd03.prod.outlook.com (2603:10b6:610:24e::14) MIME-Version: 1.0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: CH7PR03MB7860:EE_|SN7PR03MB7273:EE_ X-MS-Office365-Filtering-Correlation-Id: 0e47eac8-9b1a-48a4-fef5-08de7a0c299a X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|376014|366016|1800799024|7053199007; X-Microsoft-Antispam-Message-Info: jDmISeA4FiRzJq6CFzWI+1iJ0FDPtRctmyqMbv9oSh4oJ5A77pq/OsrYgiMkwQe3UQjYVZTro8M+8g7yQ66zlcYXkzhRIzK/s2cNIGfdz2vKX81Vbj6AIS/7yaEw/PyZ8zUrequSzZao+3L+HAsJ2bblnl0mI9+Ks5MDS+btO91JLgugZbbS2xYsTFjDsvKuzlQWZqq4EOUieqI8tlq+P29eayoSAeXHPq+m9kcy/yAVLqQ3JzDGP1rA9j7vh1ngjmbFu8mP3qz8axQx5oG3FqPa6YzNtgZUOJTtO7Y4TMqK4sVzHUKPNXFpXmq3y8D/mcP3uyKWOQDnQ6Iq2XjYG2N6OoBm9zGLrkOM0tCDILDdXj2qYOhFPobUrXfyWvHlucbtotoNgFc1DJeJhKiKdtSok1gUmEauk5cgfg5TH6ZVV2fM7w4gunmMTAJ4kuHFBcyK71mBtEOYdif9Rjxk22/nxP4Pm5QJ+6lJ/VhFyNctI+BLwMdByv4mJtRyJHZn5/rZ0TxQTGgZFSXHvIhC3VifDauqzhsAU+cY57G1qYE8gqmX9B0Xo5+bZ+yxgsWaNU2g0lVQhU6Uad1SHqn2YoAQ5/5nIaU11S7Zk5bA9eJ/zZinpBowdC4ucs/5P+VjWa/ertAy109P4tnLaL1kZye/4kM03+jj7NN5ASJVUTpcdE8TCh3kjRmPZ+w3nZ4eTP9S6TrPTc9aQtTxZSkYkpBLQ78h97bJXrwUXDWzqBE= X-Forefront-Antispam-Report: CIP:255.255.255.255;CTRY:;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:CH7PR03MB7860.namprd03.prod.outlook.com;PTR:;CAT:NONE;SFS:(13230040)(376014)(366016)(1800799024)(7053199007);DIR:OUT;SFP:1101; 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Add the bit to ACPI_PDC_P_MASK and apply "mask" in > arch_acpi_set_pdc_bits() when setting that bit. Move this next to the > other P-state related logic. > > Further apply ACPI_PDC_P_MASK also when the amd-cppc driver is in use. > > Also leave a comment regarding the clearing of bits and add a couple of > blank lines. > > Signed-off-by: Jan Beulich > --- > Including XEN_PROCESSOR_PM_CPPC may need accompanying with some change to > arch_acpi_set_pdc_bits(), but it's entirely unclear to me what to do > there. I'm unaware of an AMD counterpart of Intel's "Intel® Processor > Vendor-Specific ACPI". Plus even when the powernow driver is in use, we > never set any bits, as EIST is an Intel-only feature. We possibly never need to set any bits there for AMD, as those _PDC Processor bits are Intel specific? > acpi_set_pdc_bits() having moved to the cpufreq driver looks to have been > a mistake. It covers not only P-state related bits, but also C-state and > T-state ones. (This is only a latent issue as long as > https://lists.xen.org/archives/html/xen-devel/2026-02/msg00875.html > wouldn't land.) > > --- a/xen/arch/x86/acpi/lib.c > +++ b/xen/arch/x86/acpi/lib.c > @@ -124,6 +124,9 @@ int arch_acpi_set_pdc_bits(u32 acpi_id, > if (cpu_has(c, X86_FEATURE_EIST)) > pdc[2] |= ACPI_PDC_EST_CAPABILITY_SWSMP & mask; > > + if (hwp_active()) > + pdc[2] |= ACPI_PDC_CPPC_NATIVE_INTR & mask; > + > if (cpu_has(c, X86_FEATURE_ACPI)) > pdc[2] |= ACPI_PDC_T_FFH & mask; > > @@ -142,8 +145,5 @@ int arch_acpi_set_pdc_bits(u32 acpi_id, > !(ecx & CPUID5_ECX_INTERRUPT_BREAK)) > pdc[2] &= ~(ACPI_PDC_C_C1_FFH | ACPI_PDC_C_C2C3_FFH); > > - if (hwp_active()) > - pdc[2] |= ACPI_PDC_CPPC_NATIVE_INTR; > - > return 0; > } > --- a/xen/drivers/cpufreq/cpufreq.c > +++ b/xen/drivers/cpufreq/cpufreq.c > @@ -694,14 +694,23 @@ int acpi_set_pdc_bits(unsigned int acpi_ > { > uint32_t mask = 0; > > + /* > + * Accumulate all the bits under Xen's control, to mask them off, for > + * arch_acpi_set_pdc_bits() to then set those we want set. > + */ > if ( xen_processor_pmbits & XEN_PROCESSOR_PM_CX ) > mask |= ACPI_PDC_C_MASK | ACPI_PDC_SMP_C1PT; > - if ( xen_processor_pmbits & XEN_PROCESSOR_PM_PX ) > + > + if ( xen_processor_pmbits & > + (XEN_PROCESSOR_PM_PX | XEN_PROCESSOR_PM_CPPC) ) Currently the CPPC driver is AMD only, and hence when using it we don't care about filtering the _PDC bits, because the ones Xen knows about are Intel-only? As you say, we likely need some clarification about whether there's _PDC bits AMD care about? Linux seems to unconditionally set bits in _PDC, so some of those might actually be parsed by AMD. I think we might want to split the setting of XEN_PROCESSOR_PM_CPPC here from the addition of ACPI_PDC_CPPC_NATIVE_INTR into ACPI_PDC_P_MASK. The latter we can possibly untie from the questions we have about AMD usage of _PDC. Thanks, Roger.