From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from esa.microchip.iphmx.com (esa.microchip.iphmx.com [68.232.154.123]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id E061F1B653A; Fri, 30 Aug 2024 15:53:41 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=68.232.154.123 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1725033224; cv=none; b=EGKzhp23hY/2hDzxE9YDiIW5s1OrBzAS5r8a3tVAirWLSOZKOo5MXwvkvljVu8XbvFV169hj0bXtJZTOUJv2hnSGtG69ssyi7Y3ecIpI4+nHooWaWWzAwtWq8Tl9b2PAx5Dn47VpbdFB6RBCScNPViFP353s6ZCFXZ1QV1/vJpA= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1725033224; c=relaxed/simple; bh=L6qzfFeZ2s8hkmqa5FbxHyttz/W2Lpaa/LvWiahn0v4=; h=Message-ID:Date:MIME-Version:Subject:To:CC:References:From: In-Reply-To:Content-Type; b=MRcFUtU4sd9PCVjCd4yKlfxWX3XWwNYpGhrEMvacajul5rGRA0OUsaXsGcGss0lpVVd5neO9pPbO4Ta0d7o+napHeezawYbMUjCEqS1TX9UW9oJKu+KDmSmtNclfq99qUk9571zwfCEJwk1D0aesSjpRlc0aKiWPWDhVInQ/jOM= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=microchip.com; spf=pass smtp.mailfrom=microchip.com; dkim=pass (2048-bit key) header.d=microchip.com header.i=@microchip.com header.b=rdxNaA2e; arc=none smtp.client-ip=68.232.154.123 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=microchip.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=microchip.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=microchip.com header.i=@microchip.com header.b="rdxNaA2e" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=microchip.com; i=@microchip.com; q=dns/txt; s=mchp; t=1725033221; x=1756569221; h=message-id:date:mime-version:subject:to:cc:references: from:in-reply-to:content-transfer-encoding; bh=L6qzfFeZ2s8hkmqa5FbxHyttz/W2Lpaa/LvWiahn0v4=; b=rdxNaA2eg04v1YiPrlYZamzjsph5FZT0qICBXNUGHIPFhUyJVwiOn9Va sgE4vgmldKjTyRGE/lLeQYjEqpy6Hg5zGqdkrEKDqVzD3pKvTbdLRG4Y6 Jon6/TynagivO0dDW7PzEyzj+Jmi3UHcPN55TyEMYJZGR8NeH6COUw1Ve YBJ76L3vfNOVApWLrwMJ0bH8kF0JOQO2FgALztIlwNKlrlPgT85prToCn IqD97LzG7JBtb3+BQSpvFYcmZcN0K7gzM0F1Io5IydMrsmUhhotxOaopU NCfcIra3wLOEZZa6Y9ZUSVzgT+Qb4xYZ6DeERTYu7W1d+2d8rg68j8Y66 g==; X-CSE-ConnectionGUID: /Y93KtjZSYed2Fvm7dD/eA== X-CSE-MsgGUID: 4M/IeVpiT4KdcoQoi4MgGg== X-IronPort-AV: E=Sophos;i="6.10,189,1719903600"; d="scan'208";a="198544578" X-Amp-Result: SKIPPED(no attachment in message) Received: from unknown (HELO email.microchip.com) ([170.129.1.10]) by esa6.microchip.iphmx.com with ESMTP/TLS/ECDHE-RSA-AES128-GCM-SHA256; 30 Aug 2024 08:53:40 -0700 Received: from chn-vm-ex04.mchp-main.com (10.10.85.152) by chn-vm-ex02.mchp-main.com (10.10.85.144) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.35; Fri, 30 Aug 2024 08:53:04 -0700 Received: from [10.159.224.217] (10.10.85.11) by chn-vm-ex04.mchp-main.com (10.10.85.152) with Microsoft SMTP Server id 15.1.2507.35 via Frontend Transport; Fri, 30 Aug 2024 08:53:02 -0700 Message-ID: Date: Fri, 30 Aug 2024 17:53:24 +0200 Precedence: bulk X-Mailing-List: linux-clk@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH 0/3] clk: at91: add sama7d65 clock support Content-Language: en-US, fr-FR To: , , , , CC: , , References: From: Nicolas Ferre Organization: microchip In-Reply-To: Content-Type: text/plain; charset="UTF-8"; format=flowed Content-Transfer-Encoding: 7bit On 29/08/2024 at 18:42, Ryan.Wanner@microchip.com wrote: > From: Ryan Wanner > > Hello, > > This series adds clock support for the SAMA7D65 SoC. There are also > changes to the master clock driver and PLL driver in order to account for > the increased amount of clocks being supported in this new SoC. > > Trying to account for all the updates happening in this system, this > patch set is based off of the most recent updates to at91-next branch. > > Ryan Wanner (3): > clk: at91: sama7d65: add sama7d65 pmc driver > clk: at91: clk-master: increase maximum number of clocks > clk: at91: clk-sam9x60-pll: increase maximum amount of plls For the whole series: Acked-by: Nicolas Ferre Best regards, Nicolas > > drivers/clk/at91/Makefile | 1 + > drivers/clk/at91/clk-master.c | 2 +- > drivers/clk/at91/clk-sam9x60-pll.c | 2 +- > drivers/clk/at91/pmc.c | 1 + > drivers/clk/at91/sama7d65.c | 1372 ++++++++++++++++++++++++++++ > 5 files changed, 1376 insertions(+), 2 deletions(-) > create mode 100644 drivers/clk/at91/sama7d65.c >