From: Nicolin Chen <nicolinc@nvidia.com>
To: Shameer Kolothum Thodi <skolothumtho@nvidia.com>
Cc: "will@kernel.org" <will@kernel.org>,
"robin.murphy@arm.com" <robin.murphy@arm.com>,
Jason Gunthorpe <jgg@nvidia.com>,
"joro@8bytes.org" <joro@8bytes.org>,
"praan@google.com" <praan@google.com>,
Malak Marrid <mmarrid@nvidia.com>,
"kees@kernel.org" <kees@kernel.org>,
"Alexander.Grest@microsoft.com" <Alexander.Grest@microsoft.com>,
"baolu.lu@linux.intel.com" <baolu.lu@linux.intel.com>,
"smostafa@google.com" <smostafa@google.com>,
"linux-arm-kernel@lists.infradead.org"
<linux-arm-kernel@lists.infradead.org>,
"iommu@lists.linux.dev" <iommu@lists.linux.dev>,
"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>
Subject: Re: [PATCH RFTv1 3/3] iommu/arm-smmu-v3: Support PRI Page Request
Date: Wed, 11 Mar 2026 10:56:07 -0700 [thread overview]
Message-ID: <abGst/9dQBzoYZJD@Asurada-Nvidia> (raw)
In-Reply-To: <CH3PR12MB7548107B5BF7ACF4C0568B26AB79A@CH3PR12MB7548.namprd12.prod.outlook.com>
On Mon, Mar 09, 2026 at 04:04:31AM -0700, Shameer Kolothum Thodi wrote:
> > Now, arm_smmu_page_response() can issue CMDQ_OP_PRI_RESP for page
> > requests
> > from the IOPF infrastructure. Decode the page requests from the PRI queue,
> > and report it to the IOPF infrastructure.
> >
> > This fills the final piece for PRI support.
>
> Do we also need pci_reset_pri()/pci_enable_pri() to enable PRI on the
> device side?
>
> Also, is there a check that the device advertises PCI PRI capability
> before calling iopf_queue_add_device()?
Yes and yes.. I will respin another version after a test.
Thanks
Nicolin
prev parent reply other threads:[~2026-03-11 17:56 UTC|newest]
Thread overview: 8+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-03-03 20:13 [PATCH RFTv1 0/3] iommu/arm-smmu-v3: Add PRI support Nicolin Chen
2026-03-03 20:13 ` [PATCH RFTv1 1/3] iommu/arm-smmu-v3: Drain in-flight fault handlers Nicolin Chen
2026-03-06 23:12 ` Jason Gunthorpe
2026-03-06 23:45 ` Nicolin Chen
2026-03-03 20:13 ` [PATCH RFTv1 2/3] iommu/arm-smmu-v3: Submit CMDQ_OP_PRI_RESP for IOPF event Nicolin Chen
2026-03-03 20:13 ` [PATCH RFTv1 3/3] iommu/arm-smmu-v3: Support PRI Page Request Nicolin Chen
2026-03-09 11:04 ` Shameer Kolothum Thodi
2026-03-11 17:56 ` Nicolin Chen [this message]
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=abGst/9dQBzoYZJD@Asurada-Nvidia \
--to=nicolinc@nvidia.com \
--cc=Alexander.Grest@microsoft.com \
--cc=baolu.lu@linux.intel.com \
--cc=iommu@lists.linux.dev \
--cc=jgg@nvidia.com \
--cc=joro@8bytes.org \
--cc=kees@kernel.org \
--cc=linux-arm-kernel@lists.infradead.org \
--cc=linux-kernel@vger.kernel.org \
--cc=mmarrid@nvidia.com \
--cc=praan@google.com \
--cc=robin.murphy@arm.com \
--cc=skolothumtho@nvidia.com \
--cc=smostafa@google.com \
--cc=will@kernel.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.