From: Krzysztof Kozlowski <krzk@kernel.org>
To: Larisa Grigore <larisa.grigore@oss.nxp.com>,
Frank Li <Frank.Li@nxp.com>, Vinod Koul <vkoul@kernel.org>,
Rob Herring <robh@kernel.org>,
Krzysztof Kozlowski <krzk+dt@kernel.org>,
Conor Dooley <conor+dt@kernel.org>, Peng Fan <peng.fan@nxp.com>
Cc: imx@lists.linux.dev, dmaengine@vger.kernel.org,
devicetree@vger.kernel.org, linux-kernel@vger.kernel.org,
s32@nxp.com, Christophe Lizzi <clizzi@redhat.com>,
Alberto Ruiz <aruizrui@redhat.com>,
Enric Balletbo <eballetb@redhat.com>
Subject: Re: [PATCH] arm64: dts: s32g: add the eDMA nodes
Date: Thu, 30 Jan 2025 09:48:07 +0100 [thread overview]
Message-ID: <ac1ea985-15cd-4001-9700-a185ceb338d7@kernel.org> (raw)
In-Reply-To: <20250130072951.373027-1-larisa.grigore@oss.nxp.com>
On 30/01/2025 08:29, Larisa Grigore wrote:
> Add the two eDMA nodes in the device tree in order to enable the probing
> of the S32G2/S32G3 eDMA driver.
>
> Signed-off-by: Larisa Grigore <larisa.grigore@oss.nxp.com>
> ---
> arch/arm64/boot/dts/freescale/s32g2.dtsi | 34 ++++++++++++++++++++++++
> arch/arm64/boot/dts/freescale/s32g3.dtsi | 34 ++++++++++++++++++++++++
> 2 files changed, 68 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/freescale/s32g2.dtsi b/arch/arm64/boot/dts/freescale/s32g2.dtsi
> index 7be430b78c83..f73cd5a0906d 100644
> --- a/arch/arm64/boot/dts/freescale/s32g2.dtsi
> +++ b/arch/arm64/boot/dts/freescale/s32g2.dtsi
> @@ -317,6 +317,23 @@ usdhc0-200mhz-grp4 {
> };
> };
>
> + edma0: dma-controller@40144000 {
> + #dma-cells = <2>;
Any reason for not following DTS coding style in order of properties?
This is odd style.
> + compatible = "nxp,s32g2-edma";
> + reg = <0x40144000 0x24000>,
> + <0x4012c000 0x3000>,
> + <0x40130000 0x3000>;
> + dma-channels = <32>;
> + interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;
> + interrupt-names = "tx-0-15",
> + "tx-16-31",
> + "err";
> + clock-names = "dmamux0", "dmamux1";
> + clocks = <&clks 63>, <&clks 64>;
> + };
> +
> uart0: serial@401c8000 {
> compatible = "nxp,s32g2-linflexuart",
> "fsl,s32v234-linflexuart";
> @@ -333,6 +350,23 @@ uart1: serial@401cc000 {
> status = "disabled";
> };
>
> + edma1: dma-controller@40244000 {
> + #dma-cells = <2>;
> + compatible = "nxp,s32g2-edma";
> + reg = <0x40244000 0x24000>,
> + <0x4022c000 0x3000>,
> + <0x40230000 0x3000>;
> + dma-channels = <32>;
> + interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>;
> + interrupt-names = "tx-0-15",
> + "tx-16-31",
> + "err";
interrupts, then interrupt-names but:
> + clock-names = "dmamux0", "dmamux1";
> + clocks = <&clks 63>, <&clks 64>;
here reversed.
Best regards,
Krzysztof
next prev parent reply other threads:[~2025-01-30 8:48 UTC|newest]
Thread overview: 3+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-01-30 7:29 [PATCH] arm64: dts: s32g: add the eDMA nodes Larisa Grigore
2025-01-30 8:48 ` Krzysztof Kozlowski [this message]
2025-02-03 7:57 ` Larisa Ileana Grigore
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