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Mon, 24 Aug 2026 08:06:58 -0700 (PDT) X-Received: by 2002:a05:6102:6893:b0:6d1:8f7:18a5 with SMTP id ada2fe7eead31-77a6433632emr3704068137.1.1787584017657; Mon, 24 Aug 2026 08:06:57 -0700 (PDT) Received: from [192.168.120.193] ([178.235.128.140]) by smtp.gmail.com with ESMTPSA id 4fb4d7f45d1cf-6a59e199ad5sm9278440a12.18.2026.08.24.08.06.54 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Mon, 24 Aug 2026 08:06:56 -0700 (PDT) Message-ID: Date: Mon, 24 Aug 2026 17:06:53 +0200 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH 7/7] i2c: qcom-geni: Use geni_se_set_rate() for setting source clock frequency To: Praveen Talari , Sudeep Holla , Cristian Marussi , Ulf Hansson , Bjorn Andersson , Konrad Dybcio , Greg Kroah-Hartman , Jiri Slaby , Mark Brown , Viken Dadhaniya , Andi Shyti Cc: mukesh.savaliya@oss.qualcomm.com, chandana.chiluveru@oss.qualcomm.com, arm-scmi@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-pm@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org, linux-serial@vger.kernel.org, linux-spi@vger.kernel.org, linux-i2c@vger.kernel.org References: <20260805-derive_clk_perf_tbl_from_perf_domain_opp_table-v1-0-61171ab1cdce@oss.qualcomm.com> <20260805-derive_clk_perf_tbl_from_perf_domain_opp_table-v1-7-61171ab1cdce@oss.qualcomm.com> Content-Language: en-US From: Konrad Dybcio In-Reply-To: <20260805-derive_clk_perf_tbl_from_perf_domain_opp_table-v1-7-61171ab1cdce@oss.qualcomm.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit X-Proofpoint-Spam-Info: AW1haW4tMjYwODI0MDEyNyBTYWx0ZWRfX995nOXY7n2dL PtYPv0uQCFMCJYdfY6mDAjyB5mFUjnYUVZ+ZscTj/t+aLKitxRg5t/BAc/mlibHWQRj3uDCdRzo P0ANs9XhroPhafoyZoL9RuaoAe8cRKg= X-Proofpoint-ORIG-GUID: L6ugusWoTjSMLwULem2suiURlwA1bYS2 X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwODI0MDEyNyBTYWx0ZWRfX00rNhRIjbIPr Q4twlHP6sWRiKwKQE+2ZaexntIIPGi7NGaxmbFQGJXzS3cdjDLrqXv/bUCAikePObEqLk7Oc90A yTYKBqa9Fi5M5jgt4ooPgGhpBgATGQFSvXWW3cmIpEdrMord4YH1vFove+FUCpj8tJyRP/08NOk xVM8M8WPCg1sx0uxyvnMmAm9H+lP0oq/3bEIDFjtyZtzaZaZoi8kqnAe5unoQ7Uc0qr19GDHf55 uShQRdPSVwnCLdXMnIFTM5z9Z2x/WxQTmFRk01GtHrxAohxfiJhQj8xJ3+LdkxJvl4dS+wUDCuA b+F3FLuDbXiHl3tyuhIexW/zcHJTqAt6od06pJB04uaR9U+h8tfKGd9AkyCSsFuNWaxJSRf0DoR M2Wck9pEWKVChj3p2qesDUEgiMx3JwYS7nTIpgSan7tLJuDqsANq1+Lwh7bLwnZ1Czeillopmwq 3BykWVgz7kOZdeRHG4A== X-Proofpoint-GUID: L6ugusWoTjSMLwULem2suiURlwA1bYS2 X-Authority-Analysis: v=2.4 cv=d8DFDxjE c=1 sm=1 tr=0 ts=6a8c5e13 cx=c_pps a=R6oCqFB+Yf/t2GF8e0/dFg==:117 a=PRfkaYvzSr8QmIIGAkY2Sg==:17 a=IkcTkHD0fZMA:10 a=Sv0fKeRqtYgA:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=u7WPNUs3qKkmUXheDGA7:22 a=YMgV9FUhrdKAYTUUvYB2:22 a=7mB3cpwZ_riAn9QYn-4A:9 a=QEXdDO2ut3YA:10 a=TD8TdBvy0hsOASGTdmB-:22 X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1176,Hydra:6.1.134,FMLib:17.12.100.49 definitions=2026-08-24_04,2026-08-24_01,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 suspectscore=0 lowpriorityscore=0 bulkscore=0 adultscore=0 priorityscore=1501 malwarescore=0 spamscore=0 phishscore=0 clxscore=1015 impostorscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2606150000 definitions=main-2608240127 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.9.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20260824_080659_794800_F7FECF23 X-CRM114-Status: GOOD ( 13.21 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On 8/4/26 9:57 PM, Praveen Talari wrote: > On the SA8255P platform there is no Linux clock handler for the SE source > clock; resources are instead managed by firmware via a genpd performance > domain. The I2C driver therefore relies on geni_se_set_rate() to apply the > fixed 19.2 MHz source clock frequency expected by the SCL divider and > counter values programmed by qcom_geni_i2c_conf(). [...] > @@ -233,6 +233,10 @@ static int qcom_geni_i2c_conf(struct geni_se *se, unsigned long freq) > itr->clk_div, itr->t_high_cnt, > itr->t_low_cnt, itr->t_cycle_cnt); > > + ret = geni_se_set_rate(&gi2c->se, 19200000); > + if (ret) > + return ret; This wasn't here before and the commit message only says something to the amount of "it's necessary" - what's the difference? Konrad