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From: shuang.he@intel.com
To: shuang.he@intel.com, ethan.gao@intel.com,
	intel-gfx@lists.freedesktop.org, damien.lespiau@intel.com
Subject: Re: [PATCH 13/13] drm/i915/skl: Prefer even dividers for SKL DPLLs
Date: 08 May 2015 05:22:43 -0700	[thread overview]
Message-ID: <acb6cf$lha23e@fmsmga002.fm.intel.com> (raw)
In-Reply-To: <1431020329-11414-14-git-send-email-damien.lespiau@intel.com>

Tested-By: Intel Graphics QA PRTS (Patch Regression Test System Contact: shuang.he@intel.com)
Task id: 6348
-------------------------------------Summary-------------------------------------
Platform          Delta          drm-intel-nightly          Series Applied
PNV                                  276/276              276/276
ILK                                  302/302              302/302
SNB                                  316/316              316/316
IVB                                  342/342              342/342
BYT                 -1              228/228              227/228
BDW                                  321/321              321/321
-------------------------------------Detailed-------------------------------------
Platform  Test                                drm-intel-nightly          Series Applied
*BYT  igt@gem_userptr_blits@forked-sync-swapping-normal      PASS(2)      INIT(1)PASS(1)
Note: You need to pay more attention to line start with '*'
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  reply	other threads:[~2015-05-08 12:22 UTC|newest]

Thread overview: 41+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2015-05-07 17:38 [PATCH 00/13] Update of the HDMI DPLL dividers computation Damien Lespiau
2015-05-07 17:38 ` [PATCH 01/13] drm/i915/skl: Re-indent part of skl_ddi_calculate_wrpll() Damien Lespiau
2015-05-08  7:19   ` Daniel Vetter
2015-05-07 17:38 ` [PATCH 02/13] drm/i915/skl: Make sure to break when not finding suitable PLL dividers Damien Lespiau
2015-05-27 17:58   ` Paulo Zanoni
2015-05-28  6:31     ` Jani Nikula
2015-05-28  7:45   ` Daniel Vetter
2015-05-28 13:59     ` Paulo Zanoni
2015-05-07 17:38 ` [PATCH 03/13] drm/i915/skl: Display the WRPLL frequency we couldn't accomodate when failing Damien Lespiau
2015-05-28  7:48   ` Daniel Vetter
2015-05-07 17:38 ` [PATCH 04/13] drm/i915/skl: Propagate the error if we fail to find a suitable DPLL divider Damien Lespiau
2015-05-07 17:38 ` [PATCH 05/13] drm/i915/skl: Use a more idomatic early return Damien Lespiau
2015-05-07 17:38 ` [PATCH 06/13] drm/i915/skl: Factor out computing the DPLL paramaters from the dividers Damien Lespiau
2015-05-07 17:38 ` [PATCH 07/13] drm/i915/skl: Remove unnecessary () used with div_u64() Damien Lespiau
2015-05-07 17:38 ` [PATCH 08/13] drm/i915/skl: Remove unnecessary () used with abs_diff() Damien Lespiau
2015-05-27 18:42   ` Paulo Zanoni
2015-05-07 17:38 ` [PATCH 09/13] drm/i915/skl: Use MISSING_CASE() in skl_wrpll_params_populate() Damien Lespiau
2015-05-27 18:40   ` Paulo Zanoni
2015-05-28  7:51     ` Daniel Vetter
2015-05-28 14:06       ` Paulo Zanoni
2015-06-03 12:42         ` Damien Lespiau
2015-05-07 17:38 ` [PATCH 10/13] drm/i915: Correctly prefix HSW/BDW HDMI clock functions Damien Lespiau
2015-05-27 19:54   ` Paulo Zanoni
2015-05-07 17:38 ` [PATCH 11/13] drm/i915/skl: Don't try to store the wrong central frequency Damien Lespiau
2015-05-27 19:58   ` Paulo Zanoni
2015-05-28  7:53     ` Daniel Vetter
2015-05-07 17:38 ` [PATCH 12/13] drm/i915/skl: Replace the HDMI DPLL divider computation algorithm Damien Lespiau
2015-05-27 21:28   ` Paulo Zanoni
2015-05-27 21:51     ` Paulo Zanoni
2015-06-25 15:00       ` Damien Lespiau
2015-06-25 15:15       ` [PATCH 12/13 v2] " Damien Lespiau
2015-06-26 17:09         ` Paulo Zanoni
2015-06-25 10:21     ` [PATCH 12/13] " Damien Lespiau
2015-05-07 17:38 ` [PATCH 13/13] drm/i915/skl: Prefer even dividers for SKL DPLLs Damien Lespiau
2015-05-08 12:22   ` shuang.he [this message]
2015-05-27 21:39   ` Paulo Zanoni
2015-05-27 22:08     ` Paulo Zanoni
2015-06-25 15:18       ` Damien Lespiau
2015-06-25 15:19       ` [PATCH 13/13 v2] " Damien Lespiau
2015-06-26 17:08         ` Paulo Zanoni
2015-06-26 17:39           ` Daniel Vetter

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