From: shuang.he@intel.com
To: shuang.he@intel.com, lei.a.liu@intel.com,
intel-gfx@lists.freedesktop.org, sagar.a.kamble@intel.com
Subject: Re: [PATCH 1/1] drm/i915: Tracepoints for profiling DC9 entry and exit programming
Date: 28 Jun 2015 22:25:48 -0700 [thread overview]
Message-ID: <acb6cf$mdd29r@fmsmga002.fm.intel.com> (raw)
In-Reply-To: <1434538270-22258-1-git-send-email-sagar.a.kamble@intel.com>
Tested-By: Intel Graphics QA PRTS (Patch Regression Test System Contact: shuang.he@intel.com)
Task id: 6596
-------------------------------------Summary-------------------------------------
Platform Delta drm-intel-nightly Series Applied
ILK 303/303 303/303
SNB 312/312 312/312
IVB 343/343 343/343
BYT -1 284/284 283/284
HSW 380/380 380/380
-------------------------------------Detailed-------------------------------------
Platform Test drm-intel-nightly Series Applied
*BYT igt@gem_partial_pwrite_pread@reads-display PASS(1) FAIL(1)
Note: You need to pay more attention to line start with '*'
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prev parent reply other threads:[~2015-06-29 5:25 UTC|newest]
Thread overview: 5+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-06-17 10:51 [PATCH 1/1] drm/i915: Tracepoints for profiling DC9 entry and exit programming Sagar Arun Kamble
2015-06-17 11:30 ` Daniel Vetter
2015-06-21 4:50 ` Sagar Arun Kamble
2015-06-22 12:56 ` Daniel Vetter
2015-06-29 5:25 ` shuang.he [this message]
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