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From: Kuppuswamy Sathyanarayanan <sathyanarayanan.kuppuswamy@linux.intel.com>
To: Lukas Wunner <lukas@wunner.de>,
	Bjorn Helgaas <helgaas@kernel.org>,
	Raag Jadav <raag.jadav@intel.com>,
	Riana Tauro <riana.tauro@intel.com>,
	Yury Murashka <yurypm@arista.com>,
	Matthew W Carlis <mattc@purestorage.com>,
	linux-pci@vger.kernel.org
Cc: Mahesh J Salgaonkar <mahesh@linux.ibm.com>,
	Oliver OHalloran <oohall@gmail.com>,
	linuxppc-dev@lists.ozlabs.org,
	Aravind Iddamsetty <aravind.iddamsetty@intel.com>,
	Srinivasa Adatrao <srinivasa.adatrao@intel.com>,
	Terry Bowman <terry.bowman@amd.com>,
	Keith Busch <kbusch@kernel.org>
Subject: Re: [PATCH 6/7] PCI/AER: Renumber severity constants
Date: Tue, 29 Sep 2026 12:55:00 -0700	[thread overview]
Message-ID: <ad14dd46-851d-4caf-a877-50e53c60e661@linux.intel.com> (raw)
In-Reply-To: <244713dea3786099e9ad4eb10ff9f2f430cd7ad3.1790531238.git.lukas@wunner.de>

Hi Lukas,

On 9/27/2026 11:02 AM, Lukas Wunner wrote:
> The AER driver uses constants for Correctable, Non-Fatal and Fatal Error
> severity which look as if they match something in the spec, but are
> actually just made-up numbers.
> 
> Use the bit number in the Device Status Register instead (PCIe r7.1 sec
> 7.5.3.5).  A subsequent commit takes advantage of this by using BIT() to
> conveniently compute the register bit corresponding to a given severity.
> 
> While at it, drop the DPC_FATAL constant which was introduced by commit
> b09803b5e546 ("PCI/DPC: Use the generic pcie_do_fatal_recovery() path")
> but never saw any use in 8 years.
> 

This changes the raw severity value in the aer_event tracepoint, which
may break userspace.  rasdaemon relies on the current numbering
(enum hw_event_aer_err_type in core/ras-events.h), so it would
misclassify error.


> Signed-off-by: Lukas Wunner <lukas@wunner.de>
> ---
>  drivers/pci/pcie/aer.c  | 2 +-
>  include/linux/aer.h     | 8 ++++----
>  include/ras/ras_event.h | 2 +-
>  3 files changed, 6 insertions(+), 6 deletions(-)
> 
> diff --git a/drivers/pci/pcie/aer.c b/drivers/pci/pcie/aer.c
> index 34a8eddc427a..6bc843ab9b37 100644
> --- a/drivers/pci/pcie/aer.c
> +++ b/drivers/pci/pcie/aer.c
> @@ -504,9 +504,9 @@ void pci_aer_exit(struct pci_dev *dev)
>   * AER error strings
>   */
>  static const char * const aer_error_severity_string[] = {
> +	"Correctable",
>  	"Uncorrectable (Non-Fatal)",
>  	"Uncorrectable (Fatal)",
> -	"Correctable"
>  };
>  
>  static const char *aer_error_layer[] = {
> diff --git a/include/linux/aer.h b/include/linux/aer.h
> index df0f5c382286..795c55132008 100644
> --- a/include/linux/aer.h
> +++ b/include/linux/aer.h
> @@ -11,10 +11,10 @@
>  #include <linux/errno.h>
>  #include <linux/types.h>
>  
> -#define AER_NONFATAL			0
> -#define AER_FATAL			1
> -#define AER_CORRECTABLE			2
> -#define DPC_FATAL			3
> +/* Must match bit number in Device Status Register (PCIe r7.1, sec 7.5.3.5) */
> +#define AER_CORRECTABLE			0
> +#define AER_NONFATAL			1
> +#define AER_FATAL			2
>  
>  /*
>   * AER and DPC capabilities TLP Logging register sizes (PCIe r6.2, sec 7.8.4
> diff --git a/include/ras/ras_event.h b/include/ras/ras_event.h
> index fdb785fa4613..1e03ade99386 100644
> --- a/include/ras/ras_event.h
> +++ b/include/ras/ras_event.h
> @@ -302,7 +302,7 @@ TRACE_EVENT(non_standard_event,
>   *			([domain:]bus:device.function).
>   * u32 status -		Either the correctable or uncorrectable register
>   *			indicating what error or errors have been seen
> - * u8 severity -	error severity 0:NONFATAL 1:FATAL 2:CORRECTED
> + * u8 severity -	error severity 0:CORRECTED 1:NONFATAL 2:FATAL
>   */
>  
>  #define aer_correctable_errors					\

-- 
Sathyanarayanan Kuppuswamy
Linux Kernel Developer


  parent reply	other threads:[~2026-09-29 19:55 UTC|newest]

Thread overview: 27+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-09-27 18:02 [PATCH 0/7] Error reporting for AER-incapable devices Lukas Wunner
2026-09-27 18:02 ` [PATCH 1/7] PCI/DPC: Avoid access to non-existent AER capability Lukas Wunner
2026-09-27 18:27   ` sashiko-bot
2026-09-29 18:49   ` Kuppuswamy Sathyanarayanan
2026-09-27 18:02 ` [PATCH 2/7] PCI/DPC: Reinstate support for AER-incapable ports Lukas Wunner
2026-09-27 18:26   ` sashiko-bot
2026-09-29 19:04   ` Kuppuswamy Sathyanarayanan
2026-09-27 18:02 ` [PATCH 3/7] PCI/ERR: Avoid stale error status bits on recovery failure Lukas Wunner
2026-09-27 18:31   ` sashiko-bot
2026-09-27 18:57     ` Lukas Wunner
2026-09-29 19:20   ` Kuppuswamy Sathyanarayanan
2026-09-27 18:02 ` [PATCH 4/7] PCI/AER: Drop AER native check from handles_cxl_errors() Lukas Wunner
2026-09-27 18:26   ` sashiko-bot
2026-09-28 20:58   ` Bowman, Terry
2026-09-29 19:24   ` Kuppuswamy Sathyanarayanan
2026-09-27 18:02 ` [PATCH 5/7] PCI/AER: Move AER capability check out of pcie_aer_is_native() Lukas Wunner
2026-09-27 18:30   ` sashiko-bot
2026-09-29 19:47   ` Kuppuswamy Sathyanarayanan
2026-09-27 18:02 ` [PATCH 6/7] PCI/AER: Renumber severity constants Lukas Wunner
2026-09-27 18:29   ` sashiko-bot
2026-09-27 19:23     ` Lukas Wunner
2026-09-29 19:55   ` Kuppuswamy Sathyanarayanan [this message]
2026-09-27 18:02 ` [PATCH 7/7] PCI/AER: Enable baseline capability error reporting Lukas Wunner
2026-09-27 18:33   ` sashiko-bot
2026-09-29 21:01   ` Kuppuswamy Sathyanarayanan
2026-09-30  7:08     ` Lukas Wunner
2026-10-01 17:44       ` Kuppuswamy Sathyanarayanan

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