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From: Nicolin Chen <nicolinc@nvidia.com>
To: Jason Gunthorpe <jgg@nvidia.com>
Cc: <will@kernel.org>, <robin.murphy@arm.com>, <joro@8bytes.org>,
	<jpb@kernel.org>, <praan@google.com>, <smostafa@google.com>,
	<linux-arm-kernel@lists.infradead.org>, <iommu@lists.linux.dev>,
	<linux-kernel@vger.kernel.org>, <linux-tegra@vger.kernel.org>,
	<jonathan.cameron@huawei.com>
Subject: Re: [PATCH v4 03/10] iommu/arm-smmu-v3: Store IOTLB cache tags in struct arm_smmu_attach_state
Date: Fri, 10 Apr 2026 11:52:01 -0700	[thread overview]
Message-ID: <adlG0QTAzdh9vA4M@Asurada-Nvidia> (raw)
In-Reply-To: <20260409234223.GX3357077@nvidia.com>

On Thu, Apr 09, 2026 at 08:42:23PM -0300, Jason Gunthorpe wrote:
> On Thu, Mar 19, 2026 at 12:51:49PM -0700, Nicolin Chen wrote:
> > So far, an IOTLB tag (ASID or VMID) has been stored in the arm_smmu_domain
> > +static int __arm_smmu_domain_find_iotlb_tag(struct arm_smmu_domain *smmu_domain,
> > +					    struct arm_smmu_inv *tag)
> > +{
> > +	struct arm_smmu_invs *invs = rcu_dereference_protected(
> > +		smmu_domain->invs, lockdep_is_held(&arm_smmu_asid_lock));
> > +	size_t i;
> > +
> > +	arm_smmu_inv_assert_iotlb_tag(tag);
> > +
> > +	for (i = 0; i != invs->num_invs; i++) {
> > +		if (invs->inv[i].type == tag->type &&
> > +		    invs->inv[i].smmu == tag->smmu &&
> > +		    READ_ONCE(invs->inv[i].users)) {
> > +			*tag = invs->inv[i];
> 
> This users thing has become to hard to understand and it isn't how it
> should be.
> 
> All writers *with the possibility of concurrent access* need to use
> WRITE_ONCE since there is a RCU reader. IIRC that is just
> arm_smmu_invs_unref()
> 
> The one in arm_smmu_invs_merge() is just writing to newly allocated
> memory so it shouldn't be marked.
> 
> Only readers *with the possibility of concurrent access* should be
> marked with READ_ONCE. IIRC this is just the invalidation walker.

I added a cleanup patch to the beginning of the series and corrected
all the new reads/writes too.

> Places like this have to be protected by a lock or the whole thing is
> wrong, so it should have a lockdep annoation.

Hmm, is the lockdep_is_held() in rcu_dereference_protected() enough?

> Now what is the locking supposed to be? It looks wrong, it probably
> wants to be arm_smmu_asid_lock, but arm_smmu_mm_release() doesn't grab
> it.
> 
> But why does arm_smmu_mm_release() need a tag in the first place? ASID
> isn't going to be used when EPD0|EPD1 is set, so the tag can just be
> 0. Probably make a patch with that change early on..

I see. I added a cleanup patch.

> All the locking is important because this:
> 
> > +/* Find an existing IOTLB cache tag in smmu_domain->invs (users counter != 0) */
> 
> Must be held as an invarient into the caller, meaning the caller must
> hold arm_smmu_asid_lock while it has an active tag on the stack, and
> that should be documented here. As well as a lockdep of course.
> 
> From what I can tell the final result is correct (aside from
> arm_smmu_mm_release), just under documented.

Re-checking the locking in these functions and updating the kdocs.

Thanks
Nicolin


  reply	other threads:[~2026-04-10 18:52 UTC|newest]

Thread overview: 31+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-03-19 19:51 [PATCH v4 00/10] iommu/arm-smmu-v3: Share domain across SMMU/vSMMU instances Nicolin Chen
2026-03-19 19:51 ` [PATCH v4 01/10] iommu/arm-smmu-v3: Add a wrapper for arm_smmu_make_sva_cd() Nicolin Chen
2026-04-09 23:14   ` Jason Gunthorpe
2026-03-19 19:51 ` [PATCH v4 02/10] iommu/arm-smmu-v3: Pass in arm_smmu_make_cd_fn to arm_smmu_set_pasid() Nicolin Chen
2026-04-09 23:17   ` Jason Gunthorpe
2026-03-19 19:51 ` [PATCH v4 03/10] iommu/arm-smmu-v3: Store IOTLB cache tags in struct arm_smmu_attach_state Nicolin Chen
2026-04-09 23:42   ` Jason Gunthorpe
2026-04-10 18:52     ` Nicolin Chen [this message]
2026-04-10 20:47       ` Jason Gunthorpe
2026-04-10 21:23         ` Nicolin Chen
2026-04-10 21:41           ` Jason Gunthorpe
2026-04-10 23:04             ` Nicolin Chen
2026-03-19 19:51 ` [PATCH v4 04/10] iommu/arm-smmu-v3: Pass in IOTLB cache tag to arm_smmu_master_build_invs() Nicolin Chen
2026-04-09 23:43   ` Jason Gunthorpe
2026-03-19 19:51 ` [PATCH v4 05/10] iommu/arm-smmu-v3: Pass in IOTLB cache tag to CD and STE Nicolin Chen
2026-03-19 19:51 ` [PATCH v4 06/10] iommu/arm-smmu-v3: Introduce INV_TYPE_S2_VMID_VSMMU Nicolin Chen
2026-04-09 23:59   ` Jason Gunthorpe
2026-04-10 22:32     ` Nicolin Chen
2026-03-19 19:51 ` [PATCH v4 07/10] iommu/arm-smmu-v3: Allocate IOTLB cache tag if no id to reuse Nicolin Chen
2026-04-10  0:04   ` Jason Gunthorpe
2026-03-19 19:51 ` [PATCH v4 08/10] iommu/arm-smmu-v3: Allocate INV_TYPE_S2_VMID_VSMMU in arm_vsmmu_init Nicolin Chen
2026-04-10  0:19   ` Jason Gunthorpe
2026-03-19 19:51 ` [PATCH v4 09/10] iommu/arm-smmu-v3: Remove ASID/VMID from arm_smmu_domain Nicolin Chen
2026-04-10  0:27   ` Jason Gunthorpe
2026-04-10 22:06     ` Nicolin Chen
2026-04-10 23:25       ` Jason Gunthorpe
2026-04-11  0:06         ` Nicolin Chen
2026-03-19 19:51 ` [PATCH v4 10/10] iommu/arm-smmu-v3: Allow sharing domain across SMMUs Nicolin Chen
2026-04-10  0:32   ` Jason Gunthorpe
2026-04-10  0:36     ` Jason Gunthorpe
2026-04-10  1:18       ` Nicolin Chen

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